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公开(公告)号：US20140192934A1
公开(公告)日：2014-07-10
申请号：US13735780
申请日：2013-01-07
Applicant: NXP B.V.
Inventor： Massimo Ciacci , Remco Cornelis Herman van de Beek , Ghiath Al-Kadi
IPC: H04B1/16
CPC classification number: H04B1/16 , H04B1/0003 , H04B5/0081 , H04L25/0266 , H04L25/03 , H04L25/06
Abstract: Embodiments of a method for processing a baseband signal in a Direct Current (DC)-suppressed system, a system for processing a baseband signal in a DC-suppressed system, and a smart card are described. In one embodiment, a method for processing a baseband signal in a DC-suppressed system involves processing the baseband signal in the analog domain with a first high pass filter (HPF), converting the processed baseband signal to a digital signal, and processing the digital signal in the digital domain with a second HPF to provide a discrete-time differentiation of the baseband signal. Other embodiments are also described.
Abstract translation: 描述了用于处理直流（DC）抑制系统中的基带信号的方法，用于处理DC抑制系统中的基带信号的处理系统和智能卡的实施例。 在一个实施例中，用于处理DC抑制系统中的基带信号的方法包括用第一高通滤波器（HPF）处理模拟域中的基带信号，将处理的基带信号转换为数字信号，并处理数字信号 信号在数字域中具有第二HPF，以提供基带信号的离散时间差分。 还描述了其它实施例。
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公开(公告)号：US10541699B1
公开(公告)日：2020-01-21
申请号：US16157355
申请日：2018-10-11
Applicant: NXP B.V.
Inventor： Robert Rutten , Massimo Ciacci , Manfred Zupke , Lucien Johannes Breems , Johannes Hubertus Antonius Brekelmans , Muhammed Bolatkale , Shagun Bajoria , Soheil Bahrami
Abstract: Aspects of the disclosure are directed to compensating for errors in in an analog-to-digital converter circuit (ADC). As may be implemented in accordance with one or more embodiments, an apparatus and/or method involves an ADC that converts an analog signal into a digital signal using an output from a digital-to-analog converter circuit (DAC). A compensation circuit generates a compensation output by, for respective signal portions provided to the DAC, generating a feedback signal based on an incompatibility between the conversion of the signal portions into an analog signal and the value of the signal portions provided to the DAC. A compensation output is generated based on the signal input to the DAC with a gain applied thereto, based on the feedback signal.
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公开(公告)号：US09992012B2
公开(公告)日：2018-06-05
申请号：US15267099
申请日：2016-09-15
Applicant: NXP B.V.
Inventor： Adaickalavan Meiyappan , Juhui Li , Ghiath Al-Kadi , Massimo Ciacci
CPC classification number: H04L7/06 , H04L25/03006 , H04L25/06 , H04L25/066 , H04L25/4923 , H04L27/06 , H04L43/087
Abstract: A differential detector for a receiver and a method of detecting the value of symbols of a signal is disclosed. In particular, a detector comprising: an analog to digital converter for sampling samples from symbols of a signal; a differentiator configured to differentiate the samples with a transfer function to produce a differentiated series of samples for each symbol; and a decision device configured to determine the value of each symbol by comparing values of the differentiated series of samples with boundary condition values.
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公开(公告)号：US09768985B2
公开(公告)日：2017-09-19
申请号：US15006794
申请日：2016-01-26
Applicant: NXP B.V.
Inventor： Massimo Ciacci , Ghiath Al-kadi , Remco Cornelis Herman van de Beek , Jos Verlinden
CPC classification number: H04L25/03019 , H04L25/03343 , H04L27/34 , H04L27/368 , H04L2025/03726 , H04L2025/03802
Abstract: An apparatus includes an antenna that is configured to transmit a radio frequency signal across a transmission media having a channel response impairment. A transmission path includes an encoder circuit that encodes data on a carrier signal; and a pre-equalizer circuit that is configured to pre-distort the encoded data according to equalizer coefficients representing the channel response impairment. A first equalization path includes circuitry that generates the equalizer coefficients based upon transients resulting from a presence change event for the carrier signal. A second equalization path includes circuitry that generates the equalizer coefficients based upon knowledge of encoded data on the carrier signal. Selection circuitry selects between the first equalization path and the second equalization path.
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公开(公告)号：US09686041B2
公开(公告)日：2017-06-20
申请号：US14841644
申请日：2015-08-31
Applicant: NXP B.V.
Inventor： Remco van de Beek , Massimo Ciacci , Ghiath Al-kadi
IPC: H04B5/00 , H04L5/12 , H04L27/22 , H04L1/00 , G06K19/067 , H04L7/04 , H04L27/227 , H04L27/00 , H04L5/00
CPC classification number: H04L1/0039 , G06K19/067 , H04B5/0031 , H04B5/0062 , H04B5/0093 , H04L5/001 , H04L7/041 , H04L7/042 , H04L27/22 , H04L27/227 , H04L27/2272 , H04L27/2273 , H04L2027/0036 , H04L2027/0057 , H04L2027/0095
Abstract: An apparatus for detecting the end of a communication is disclosed. The apparatus includes an interface circuit for receiving an encoded signal and a carrier signal recovery circuit coupled to an output of the interface circuit. The carrier signal recovery circuit is configured to output a carrier signal of the encoded signal and a second signal that is out of phase with the carrier signal. The apparatus also includes a decoding circuit configured to decode the encoded signal as a function of both the encoded signal and the carrier signal output by the carrier signal recovery circuit. The apparatus also includes a detection circuit configured to detect an indication of an end of a communication in the encoded signal as a function of both the encoded signal and the second signal.
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Patent Agency Ranking
公开(公告)号：US09426003B2
公开(公告)日：2016-08-23
申请号：US14133267
申请日：2013-12-18
Applicant: NXP B.V.
Inventor： Remco Cornelis Herman van de Beek , Massimo Ciacci , Ghiath Al-kadi
CPC classification number: H04L25/06 , G06K19/0715 , G06K19/07771 , H03F1/30 , H03F2200/375 , H04L27/06
Abstract: A proximity integrated circuit card bias adjustment. In one example, a decoding circuit, having an decoding range, for translating a data-frame signal having an information portion and a bias portion into an output code; and a bias adjust circuit coupled to receive the output code from the decoding circuit, and adjust the bias portion of the data-frame signal such that the output code is within the decoding range is disclosed. In another example, a method for proximity integrated circuit card bias adjustment, comprising: translating a data-frame signal having an information portion and a bias portion into an output code; and adjusting the bias portion of the data-frame signal such that the output code is within a decoding range is disclosed.
Abstract translation: 近程集成电路卡偏置调整。 在一个示例中，具有用于将具有信息部分和偏置部分的数据帧信号转换为输出代码的解码范围的解码电路; 以及偏置调整电路，其耦合以从解码电路接收输出代码，并且调整数据帧信号的偏置部分，使得输出代码处于解码范围内。 在另一示例中，一种用于近程集成电路卡偏移调整的方法，包括：将具有信息部分和偏置部分的数据帧信号转换为输出代码; 并且公开了数据帧信号的偏置部分，使得输出码在解码范围内。
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公开(公告)号：US20150372787A1
公开(公告)日：2015-12-24
申请号：US14841644
申请日：2015-08-31
Applicant: NXP B.V.
Inventor： Remco van de Beek , Massimo Ciacci , Ghiath Al-kadi
CPC classification number: H04L1/0039 , G06K19/067 , H04B5/0031 , H04B5/0062 , H04B5/0093 , H04L5/001 , H04L7/041 , H04L7/042 , H04L27/22 , H04L27/227 , H04L27/2272 , H04L27/2273 , H04L2027/0036 , H04L2027/0057 , H04L2027/0095
Abstract: An apparatus for detecting the end of a communication is disclosed. The apparatus includes an interface circuit for receiving an encoded signal and a carrier signal recovery circuit coupled to an output of the interface circuit. The carrier signal recovery circuit is configured to output a carrier signal of the encoded signal and a second signal that is out of phase with the carrier signal. The apparatus also includes a decoding circuit configured to decode the encoded signal as a function of both the encoded signal and the carrier signal output by the carrier signal recovery circuit. The apparatus also includes a detection circuit configured to detect an indication of an end of a communication in the encoded signal as a function of both the encoded signal and the second signal.
Abstract translation: 公开了一种用于检测通信结束的装置。 该装置包括用于接收编码信号的接口电路和耦合到接口电路的输出的载波信号恢复电路。 载波信号恢复电路被配置为输出编码信号的载波信号和与载波信号异相的第二信号。 该装置还包括解码电路，其被配置为根据由载波信号恢复电路输出的编码信号和载波信号两者对编码信号进行解码。 该装置还包括检测电路，其被配置为根据编码信号和第二信号来检测编码信号中的通信结束的指示。
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18.发明授权公开(公告)号：US08964904B2
公开(公告)日：2015-02-24
申请号：US13735780
申请日：2013-01-07
Applicant: NXP B.V.
Inventor： Massimo Ciacci , Remco Cornelis Herman van de Beek , Ghiath Al-Kadi
CPC classification number: H04B1/16 , H04B1/0003 , H04B5/0081 , H04L25/0266 , H04L25/03 , H04L25/06
Abstract: Embodiments of a method for processing a baseband signal in a Direct Current (DC)-suppressed system, a system for processing a baseband signal in a DC-suppressed system, and a smart card are described. In one embodiment, a method for processing a baseband signal in a DC-suppressed system involves processing the baseband signal in the analog domain with a first high pass filter (HPF), converting the processed baseband signal to a digital signal, and processing the digital signal in the digital domain with a second HPF to provide a discrete-time differentiation of the baseband signal. Other embodiments are also described.
Abstract translation: 描述了用于处理直流（DC）抑制系统中的基带信号的方法，用于处理DC抑制系统中的基带信号的处理系统和智能卡的实施例。 在一个实施例中，用于处理DC抑制系统中的基带信号的方法包括用第一高通滤波器（HPF）处理模拟域中的基带信号，将处理的基带信号转换为数字信号，并处理数字信号 信号在数字域中具有第二HPF，以提供基带信号的离散时间差分。 还描述了其它实施例。
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公开(公告)号：US20140145787A1
公开(公告)日：2014-05-29
申请号：US13684886
申请日：2012-11-26
Applicant: NXP B.V.
Inventor： Jos Verlinden , Remco van de Beek , Massimo Ciacci
CPC classification number: H03G1/04 , H03F3/005 , H03F3/189 , H03F3/211 , H03F3/2175 , H03F3/245 , H03F3/68 , H03M1/662 , H03M1/804
Abstract: Signals are processed to facilitate the mitigation and/or cancellation of undesirable components within the signal. As consistent with one or more embodiments, input/delay circuits offset the phase of an input signal, as presented to respective amplifiers. The phase offset is used, upon combination of the outputs of the respective amplifiers, to cancel the undesirable components of the signal. Such an approach may, for example, involve phase offset in a digital domain, with correction upon combination of the signals as presented in an analog domain.
Abstract translation: 对信号进行处理以便于消除和/或消除信号内不期望的组件。 与一个或多个实施例一致，输入/延迟电路将输入信号的相位偏移到相应的放大器。 在相应放大器的输出组合时，使用相位偏移来消除信号的不期望的分量。 例如，这种方法可以涉及在数字域中的相位偏移，并且在模拟域中呈现的信号的组合进行校正。
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公开(公告)号：US10243533B1
公开(公告)日：2019-03-26
申请号：US15891790
申请日：2018-02-08
Applicant: NXP B.V.
Inventor： Marco Berkhout , Fred Mostert , Massimo Ciacci , Mattheus Johan Koerts , Martin Kessel
Abstract: Aspects are directed to an amplifier circuit including a signal processing circuit and a calibration circuit. In certain specific embodiments, the signal processing circuit includes a signal combiner and a closed-loop feedback path, and the signal processing circuit is designed to provide a loop transfer function for a derived signal partly representing contributions from an audio input signal, a control or pilot signal having a target frequency range, and a calibration signal. The signal combiner is designed to combine aspects of the control or pilot signal and aspects of the audio input signal, and the calibration circuit is designed to adjust an effective gain of the derived signal in response to whether a unity-gain frequency of a signal in the closed-loop feedback path, as provided via the loop transfer function, is higher or lower than the target frequency range. Consistent therewith and in yet more specific embodiments, such an amplifier circuit can define the target frequency range relative to the transfer function and an associated unity-gain frequency.
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