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    SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME
    12.
    发明申请
    SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME 有权

    公开(公告)号：US20220238446A1

    公开(公告)日：2022-07-28

    申请号：US17718454

    申请日：2022-04-12

    Applicant: MediaTek Inc.

    Inventor： Po-Hao CHANG ,  Yi-Jou Lin ,  Hung-Chuan Chen

    IPC: H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00

    Abstract: A semiconductor package structure includes a first semiconductor die and a second semiconductor die neighboring the first semiconductor die. The first semiconductor die includes a first edge, a second edge opposite the first edge, and a first metal layer exposed from the second edge. The second semiconductor includes a third edge neighboring the second edge of the first semiconductor die, a fourth edge opposite the third edge, and a second metal layer exposed from the third edge. The first metal layer of the first semiconductor die is electrically connected to the second metal layer of the second semiconductor die.

    ELECTRONIC PACKAGE WITH ROTATED SEMICONDUCTOR DIE
    13.
    发明申请
    ELECTRONIC PACKAGE WITH ROTATED SEMICONDUCTOR DIE 有权

    公开(公告)号：US20220108954A1

    公开(公告)日：2022-04-07

    申请号：US17553760

    申请日：2021-12-16

    Applicant: MEDIATEK INC.

    Inventor： Yao-Chun Su ,  Chih-Jung Hsu ,  Yi-Jou Lin ,  I-Hsuan Peng

    IPC: H01L23/538 ,  H01L23/31 ,  H01L23/367 ,  H01L23/00 ,  H01L23/58 ,  H01L23/66 ,  H01L25/065

    Abstract: An electronic package includes a package substrate of a rectangular shape, and a chip package including a first interface circuit die and a second interface circuit die. The first interface circuit die and second interface circuit die are mounted on a redistribution layer structure and encapsulated within a molding compound. The chip package is mounted on a top surface of the package substrate and rotated relative to the package substrate above a vertical axis that is orthogonal to the top surface through a rotation offset angle. A metal ring is mounted on the top surface of the package substrate.

    SEMICONDUCTOR PACKAGE HAVING A STIFFENER RING
    15.
    发明申请
    SEMICONDUCTOR PACKAGE HAVING A STIFFENER RING 审中-公开

    公开(公告)号：US20190115269A1

    公开(公告)日：2019-04-18

    申请号：US16217016

    申请日：2018-12-11

    Applicant: MEDIATEK INC.

    Inventor： Chi-Wen Pan ,  I-Hsuan Peng ,  Sheng-Liang Kuo ,  Yi-Jou Lin ,  Tai-Yu Chen

    IPC: H01L23/16 ,  H01L23/367 ,  H01L23/538 ,  H01L23/00 ,  H01L25/065

    Abstract: A semiconductor package includes a package substrate having a top surface and a bottom surface, and a stiffener ring mounted on the top surface of the package substrate. The stiffener ring includes a reinforcement rib that is coplanar with the stiffener ring on the top surface of the package substrate. At least two compartments are defined by the stiffener ring and the reinforcement rib. At least two individual chip packages are mounted on chip mounting regions within the at least two compartments, respectively, thereby constituting a package array on the package substrate.

    Semiconductor package structure having an annular frame with truncated corners
    16.
    发明授权
    Semiconductor package structure having an annular frame with truncated corners 有权

    公开(公告)号：US12142598B2

    公开(公告)日：2024-11-12

    申请号：US18170078

    申请日：2023-02-16

    Applicant: MEDIATEK INC.

    Inventor： Chia-Cheng Chang ,  Tzu-Hung Lin ,  I-Hsuan Peng ,  Yi-Jou Lin

    IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/498 ,  H01L23/538

    Abstract: A semiconductor package structure includes a substrate having a substrate having a first surface and second surface opposite thereto, wherein the substrate comprises a wiring structure. The structure also has a first semiconductor die disposed on the first surface of the substrate and electrically coupled to the wiring structure, and a second semiconductor die disposed on the first surface and electrically coupled to the wiring structure, wherein the first semiconductor die and the second semiconductor die are arranged in a side-by-side manner. A molding material surrounds the first semiconductor die and the second semiconductor die, wherein the first semiconductor die is separated from the second semiconductor die by the molding material. Finally, an annular frame mounted on the first surface of the substrate, wherein the annular frame surrounds the first semiconductor die and the second semiconductor die.

    SEMICONDUCTOR PACKAGE STRUCTURE
    20.
    发明申请
    SEMICONDUCTOR PACKAGE STRUCTURE 有权

    公开(公告)号：US20210313271A1

    公开(公告)日：2021-10-07

    申请号：US17208175

    申请日：2021-03-22

    Applicant: MEDIATEK INC.

    Inventor： Yi-Lin Tsai ,  Wen-Sung Hsu ,  I-Hsuan Peng ,  Yi-Jou Lin

    IPC: H01L23/538 ,  H01L23/498 ,  H01L23/00

    Abstract: A semiconductor package structure includes a substrate, a first redistribution layer, a second redistribution layer, a bridge structure, a first semiconductor component, and a second semiconductor component. The first redistribution layer is over the substrate. The second redistribution layer is over the first redistribution layer. The bridge structure is between the first redistribution layer and the second redistribution layer, wherein the bridge structure includes an active device. The first semiconductor component and the second semiconductor component are located over the second redistribution layer, wherein the first semiconductor component is electrically coupled to the second semiconductor component through the second redistribution layer and the bridge structure.

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