Process-Induced Displacement Characterization During Semiconductor Production

    公开(公告)号:US20190333794A1

    公开(公告)日:2019-10-31

    申请号:US16019341

    申请日:2018-06-26

    Abstract: A controller is configured to perform at least a first characterization process prior to at least one discrete backside film deposition process on a semiconductor wafer; perform at least an additional characterization process following the at least one discrete backside film deposition process; determine at least one of a film force or one or more in-plane displacements for at least one discrete backside film deposited on the semiconductor wafer via the at least one discrete backside film deposition process based on the at least the first characterization process and the at least the additional characterization process; and provide at least one of the film force or the one or more in-plane displacements to at least one process tool via at least one of a feed forward loop or a feedback loop to improve performance of one or more fabrication processes.

    Model-Based Hot Spot Monitoring
    14.
    发明申请
    Model-Based Hot Spot Monitoring 审中-公开
    基于模型的热点监测

    公开(公告)号:US20160327605A1

    公开(公告)日:2016-11-10

    申请号:US15148116

    申请日:2016-05-06

    CPC classification number: G01B11/00 H01L22/12 H01L22/20

    Abstract: Methods and systems for monitoring parameters characterizing a set of hot spot structures fabricated at different locations on a semiconductor wafer are presented herein. The hot spot structures are device structures that exhibit sensitivity to process variations and give rise to limitations on permissible process variations that must be enforced to prevent device failures and low yield. A trained hot spot measurement model is employed to receive measurement data generated by one or more metrology systems at one or more metrology targets and directly determine values of one or more hot spot parameters. The hot spot measurement model is trained to establish a functional relationship between one or more characteristics of a hot spot structure under consideration and corresponding measurement data associated with measurements of at least one metrology target on the same wafer. A fabrication process parameter is adjusted based on the value of a measured hot spot parameter.

    Abstract translation: 本文提供了用于监测表征在半导体晶片上的不同位置处制造的一组热点结构的参数的方法和系统。 热点结构是对工艺变化表现出敏感性并且对必须执行的允许的工艺变化产生限制以防止器件故障和低产量的器件结构。 采用经过训练的热点测量模型来接收由一个或多个测量系统在一个或多个测量目标产生的测量数据,并直接确定一个或多个热点参数的值。 对热点测量模型进行训练,以建立所考虑的热点结构的一个或多个特征与相同测量结果相关联的测量数据与相同晶片上的至少一个测量目标的测量数据之间的功能关系。 基于测量的热点参数的值来调整制造工艺参数。

    Photoresist Simulation
    15.
    发明申请
    Photoresist Simulation 审中-公开
    光刻胶仿真

    公开(公告)号:US20140067346A1

    公开(公告)日:2014-03-06

    申请号:US14011989

    申请日:2013-08-28

    CPC classification number: G06F19/702 G03F7/0045

    Abstract: A processor based method for measuring dimensional properties of a photoresist profile by determining a number acid generators and quenchers within a photoresist volume, determining a number of photons absorbed by the photoresist volume, determining a number of the acid generators converted to acid, determining a number of acid and quencher reactions within the photoresist volume, calculating a development of the photoresist volume, producing with the processor a three-dimensional simulated scanning electron microscope image of the photoresist profile created by the development of the photoresist volume, and measuring the dimensional properties of the photoresist profile.

    Abstract translation: 一种基于处理器的方法,用于通过确定光致抗蚀剂体积内的数量的酸产生剂和猝灭剂来测量光致抗蚀剂轮廓的尺寸性质,确定由光致抗蚀剂体积吸收的光子数量,确定转化为酸的酸数发生器的数量, 在光致抗蚀剂体积内的酸和猝灭反应,计算光致抗蚀剂体积的发展,用处理器产生通过光刻胶体积的发展产生的光致抗蚀剂轮廓的三维模拟扫描电子显微镜图像,并且测量光致抗蚀剂体积的尺寸特性 光致抗蚀剂轮廓。

    Metrology using overlay and yield critical patterns

    公开(公告)号:US10685165B2

    公开(公告)日:2020-06-16

    申请号:US15082152

    申请日:2016-03-28

    Abstract: Metrology methods are provided, which comprise identifying overlay critical patterns in a device design, the overlay critical patterns having an overlay sensitivity to process variation above a specified threshold that depends on design specifications; and using metrology targets that correspond to the identified overlay critical patterns. Alternatively or complementarily, metrology methods comprise identifying yield critical patterns according to a corresponding process window narrowing due to specified process variation, wherein the narrowing is defined by a dependency of edge placement errors (EPEs) of the patterns on process parameters. Corresponding targets and measurements are provided.

    System and Method for Process-Induced Distortion Prediction During Wafer Deposition

    公开(公告)号:US20180096906A1

    公开(公告)日:2018-04-05

    申请号:US15707927

    申请日:2017-09-18

    Abstract: A system is disclosed. The system includes a tool cluster. The tool cluster includes a first deposition tool configured to deposit a first layer on a wafer. The tool cluster additionally includes an interferometer tool configured to obtain one or more measurements of the wafer. The tool cluster additionally includes a second deposition tool configured to deposit a second layer on the wafer. The tool cluster additionally includes a vacuum assembly. One or more correctables configured to adjust at least one of the first deposition tool or the second deposition tool are determined based on the one or more measurements. The one or more measurements are obtained between the deposition of the first layer and the deposition of the second layer without breaking the vacuum generated by the vacuum assembly.

    Photoresist simulation
    19.
    发明授权

    公开(公告)号:US09679116B2

    公开(公告)日:2017-06-13

    申请号:US14011989

    申请日:2013-08-28

    CPC classification number: G06F19/702 G03F7/0045

    Abstract: A processor based method for measuring dimensional properties of a photoresist profile by determining a number acid generators and quenchers within a photoresist volume, determining a number of photons absorbed by the photoresist volume, determining a number of the acid generators converted to acid, determining a number of acid and quencher reactions within the photoresist volume, calculating a development of the photoresist volume, producing with the processor a three-dimensional simulated scanning electron microscope image of the photoresist profile created by the development of the photoresist volume, and measuring the dimensional properties of the photoresist profile.

    METROLOGY TARGET DESIGN FOR TILTED DEVICE DESIGNS
    20.
    发明申请
    METROLOGY TARGET DESIGN FOR TILTED DEVICE DESIGNS 审中-公开
    倾斜设备设计的计量目标设计

    公开(公告)号:US20170023358A1

    公开(公告)日:2017-01-26

    申请号:US15287388

    申请日:2016-10-06

    CPC classification number: G01J9/00 G03F7/705 G03F7/70683 H01L22/30

    Abstract: Metrology methods, modules and targets are provided, for measuring tilted device designs. The methods analyze and optimize target design with respect to the relation of the Zernike sensitivity of pattern placement errors (PPEs) between target candidates and device designs. Monte Carlo methods may be applied to enhance the robustness of the selected target candidates to variation in lens aberration and/or in device designs. Moreover, considerations are provided for modifying target parameters judiciously with respect to the Zernike sensitivities to improve metrology measurement quality and reduce inaccuracies.

    Abstract translation: 提供了测量方法,模块和目标,用于测量倾斜的设备设计。 该方法针对目标候选者和设备设计之间的图案布局错误(PPEs)的泽尔尼克敏感度的关系,分析和优化目标设计。 可以应用蒙特卡洛方法来增强所选择的目标候选者对透镜像差和/或装置设计中的变化的鲁棒性。 此外,还提供了考虑到明确地修改Zernike敏感度的目标参数,以提高计量测量质量并减少不准确度。

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