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    ARRAY SUBSTRATE, METHOD FOR PRODUCING THE SAME AND DISPLAY DEVICE
    11.
    发明申请
    ARRAY SUBSTRATE, METHOD FOR PRODUCING THE SAME AND DISPLAY DEVICE 审中-公开
    阵列基板，其制造方法和显示装置

    公开(公告)号：US20160365458A1

    公开(公告)日：2016-12-15

    申请号：US15104524

    申请日：2015-11-10

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Lei Shi ,  Xiaowei Xu

    IPC: H01L29/786 ,  H01L29/66 ,  H01L21/426 ,  H01L21/027 ,  H01L21/266 ,  H01L27/12 ,  H01L21/02

    CPC classification number: H01L29/78648 ,  H01L21/02532 ,  H01L21/02565 ,  H01L21/02592 ,  H01L21/02595 ,  H01L21/02675 ,  H01L21/0273 ,  H01L21/266 ,  H01L21/28 ,  H01L21/426 ,  H01L27/1218 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/1274 ,  H01L29/6675 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78618 ,  H01L29/78645 ,  H01L29/78672 ,  H01L29/7869

    Abstract: Disclosed are an array substrate, a method for producing the same and a display device including the same. The array substrate includes a substrate; a first gate, a first gate insulation layer, an active layer, a second gate insulation layer, a second gate, a third gate insulation layer and source and drain electrodes provided on the substrate in sequence. Two side regions outside a region of the active layer corresponding to the second gate are source and drain-lightly doped regions and source and drain-heavily doped regions, respectively. The source and drain electrodes are contacted with the heavily doped source and drain regions, respectively. The first gate is provided below the lightly doped drain region corresponding to the drain electrode, or the first gate includes first and second sub parts which are respectively provided below the lightly doped source and drain regions corresponding to the source and drain electrodes respectively.

    Abstract translation: 公开了阵列基板及其制造方法以及包括该阵列基板的显示装置。 阵列基板包括基板; 第一栅极，第一栅极绝缘层，有源层，第二栅极绝缘层，第二栅极，第三栅极绝缘层以及依次设置在基板上的源极和漏极。 对应于第二栅极的有源层的区域之外的两个侧面区域分别是源极和漏极 - 轻掺杂区域以及源极和漏极 - 重掺杂区域。 源极和漏极分别与重掺杂的源极和漏极区接触。 第一栅极设置在对应于漏电极的轻掺杂漏极区域的下方，或者第一栅极包括分别设置在对应于源电极和漏电极的轻掺杂源极和漏极区域之下的第一和第二子部分。

    AMOLED display panel having image scanning function
    12.
    发明授权
    AMOLED display panel having image scanning function 有权

    公开(公告)号：US11315990B2

    公开(公告)日：2022-04-26

    申请号：US16099530

    申请日：2017-12-15

    Applicant: BOE Technology Group Co., Ltd.

    Inventor： Libin Liu ,  Xiaowei Xu

    IPC: H01L27/32 ,  G09G3/3258 ,  G09G3/3266 ,  G09G3/3291

    Abstract: The present application discloses a display panel comprising a substrate, a transistor layer on the substrate, and a pixel-defining layer on a side of the transistor layer distal to the substrate to divide the display panel into a plurality of subpixel regions. At least one subpixel region includes a display sub-region and a light-sensitive sub-region. The display panel further includes a plurality of organic light-emitting diodes formed on the transistor layer respectively on the plurality of subpixel regions. Additionally, the display panel includes a plurality of pixel circuits formed in the transistor layer respectively on the plurality of subpixel regions. Each pixel circuit includes at least a display-driving sub-circuit coupled to one organic light-emitting diode. At least one pixel circuit in the at least one subpixel region includes a light-sensing sub-circuit formed on the light-sensitive sub-region and coupled to the display-driving sub-circuit formed on the display sub-region.

    AMOLED DISPLAY PANEL HAVING IMAGE SCANNING FUNCTION
    13.
    发明申请
    AMOLED DISPLAY PANEL HAVING IMAGE SCANNING FUNCTION 有权

    公开(公告)号：US20210225965A1

    公开(公告)日：2021-07-22

    申请号：US16099530

    申请日：2017-12-15

    Applicant: BOE Technology Group Co., Ltd.

    Inventor： Libin Liu ,  Xiaowei Xu

    IPC: H01L27/32 ,  G09G3/3266 ,  G09G3/3291 ,  G09G3/3258

    Abstract: The present application discloses a display panel comprising a substrate, a transistor layer on the substrate, and a pixel-defining layer on a side of the transistor layer distal to the substrate to divide the display panel into a plurality of subpixel regions. At least one subpixel region includes a display sub-region and a light-sensitive sub-region. The display panel further includes a plurality of organic light-emitting diodes formed on the transistor layer respectively on the plurality of subpixel regions. Additionally, the display panel includes a plurality of pixel circuits formed in the transistor layer respectively on the plurality of subpixel regions. Each pixel circuit includes at least a display-driving sub-circuit coupled to one organic light-emitting diode. At least one pixel circuit in the at least one subpixel region includes a light-sensing sub-circuit formed on the light-sensitive sub-region and coupled to the display-driving sub-circuit formed on the display sub-region.

    Method for manufacturing thin film transistor
    15.
    发明授权
    Method for manufacturing thin film transistor 有权

    公开(公告)号：US10297678B2

    公开(公告)日：2019-05-21

    申请号：US15989773

    申请日：2018-05-25

    Applicant: BOE Technology Group Co., Ltd.

    Inventor： Xiaolong Li ,  Zunqing Song ,  Xiaowei Xu ,  Dong Li

    IPC: H01L21/00 ,  H01L21/84 ,  H01L29/66 ,  H01L21/768 ,  H01L21/324 ,  H01L21/265

    Abstract: The present disclosure provides a method for manufacturing a thin film transistor comprising, forming a pattern of an active layer on a substrate through a patterning process; performing ion doping to a channel region of the active layer; forming a gate insulating layer; forming a pattern of a gate through the patterning process; performing ion doping to a source contact region and a drain contact region of the active layer; forming an interlayer insulating layer; and performing laser annealing to the active layer, so as to make the active layer crystallize and the ions doped in the channel region, the source contact region and the drain contact region of the active layer activate simultaneously. In this method, the crystallization of the active layer and the activation of the ions doped in the active layer are implemented in the same process, which reduces the process cost and improves the efficiency.

    Array substrate and manufacturing method thereof and display apparatus
    19.
    发明授权
    Array substrate and manufacturing method thereof and display apparatus 有权
    阵列基板及其制造方法和显示装置

    公开(公告)号：US09524991B2

    公开(公告)日：2016-12-20

    申请号：US14422343

    申请日：2014-06-30

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Wenqing Xu ,  Hui Tian ,  Xiaowei Xu

    IPC: H01L27/12 ,  H01L27/32 ,  H01L29/786

    CPC classification number: H01L27/1255 ,  H01L27/1222 ,  H01L27/1274 ,  H01L27/3265 ,  H01L29/78675

    Abstract: An array substrate and a manufacturing method thereof, and a display apparatus comprising the array substrate are provided. The array substrate comprises a base substrate, and a thin film transistor and a storing capacitor provided on the base substrate, the thin film transistor comprises a gate, a source, a drain and a gate insulation layer provided between the source and drain and the gate, the storing capacitor comprises a first plate, a second plate and a dielectric layer provided between the first plate and the second plate, wherein, both of the first plate and the second plate are formed of metal material, and the dielectric layer is formed of the same material as the gate insulation layer. In the array substrate of the present invention, the charging speed of the storing capacitor can be improved and the display quality of the display apparatus comprising the array substrate is further improved.

    Abstract translation: 提供阵列基板及其制造方法以及包括阵列基板的显示装置。 阵列基板包括基底基板和设置在基底基板上的薄膜晶体管和存储电容器，薄膜晶体管包括设置在源极和漏极与栅极之间的栅极，源极，漏极和栅极绝缘层 存储电容器包括设置在第一板和第二板之间的第一板，第二板和介电层，其中，第一板和第二板都由金属材料形成，并且介电层由 与栅极绝缘层相同的材料。 在本发明的阵列基板中，可以提高存储电容器的充电速度，并且进一步提高包括阵列基板的显示装置的显示质量。

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