公开(公告)号：US11887400B2

公开(公告)日：2024-01-30

申请号：US16343769

申请日：2018-11-15

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jing Niu ,  Chengchung Yang ,  Fangzhen Zhang

IPC: G06V40/13 ,  H10K50/86 ,  H10K59/12 ,  H10K59/60 ,  H10K59/65

CPC classification number: G06V40/1318 ,  H10K50/865 ,  H10K59/12 ,  H10K59/60 ,  H10K59/65

Abstract: A display substrate includes a base substrate, and a plurality of light emitters and a plurality of light sensors over the base substrate. The light emitters and light sensors are configured to respectively emit lights towards, and sense lights reflected by, a pattern to be detected, such as a fingerprint. At least one light emitter includes a first electrode, a light-emitting layer, and a second electrode, sequentially over the base substrate. At least one light sensor includes a third electrode, a photosensitive layer, and a fourth electrode, sequentially over the base substrate. The first electrode and the third electrode are integral or the second electrode and the fourth electrode are integral. A method of using the display substrate to identify a pattern such as a fingerprint can be employed by a display panel containing the display substrate.

公开(公告)号：US10079250B2

公开(公告)日：2018-09-18

申请号：US15310182

申请日：2015-12-22

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Fangzhen Zhang ,  SeungJin Choi ,  Jing Niu ,  Shuang Sun ,  Zhijun Lv

IPC: H01L21/00 ,  H01L21/16 ,  H01L27/12 ,  H01L29/24 ,  H01L29/786 ,  H01L21/027 ,  H01L21/441 ,  H01L29/45 ,  H01L29/66 ,  H01L21/02

CPC classification number: H01L27/1225 ,  H01L21/02565 ,  H01L21/0274 ,  H01L21/441 ,  H01L27/1218 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/24 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/7869

Abstract: The present disclosure provides an array substrate, its manufacturing method, and a display device. The method includes steps of forming a passivation layer on a base substrate, and forming a contact layer and a pixel electrode on the base substrate with the passivation layer through a single patterning process. The contact layer is made of an identical transparent conductive material to the pixel electrode.

公开(公告)号：US09859304B2

公开(公告)日：2018-01-02

申请号：US14436995

申请日：2014-08-20

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Shuang Sun ,  Fangzhen Zhang ,  Jing Niu

IPC: H01L21/44 ,  H01L27/12 ,  G02F1/1339 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/027 ,  H01L21/3213 ,  H01L21/4763 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/1222 ,  G02F1/1339 ,  G02F1/134336 ,  G02F1/13439 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134372 ,  G02F2001/136231 ,  G02F2001/13685 ,  H01L21/0273 ,  H01L21/32134 ,  H01L21/32139 ,  H01L21/47635 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/6675 ,  H01L29/66969 ,  H01L29/78663 ,  H01L29/78672 ,  H01L29/7869

Abstract: The present invention provides an array substrate and a manufacturing method thereof and a display device. The manufacturing method comprises: forming a pattern including a pixel electrode and a source of a thin film transistor on a base substrate through a single patterning process, the pixel electrode is provided in a layer under a layer in which the source is located; forming a pattern including a drain, an active layer, a gate insulation layer and a gate of the thin film transistor through a single patterning process, the active layer covers the source and the drain, and is separated from the gate through the gate insulation layer; and forming a pattern including a passivation layer, a common electrode and a gate line through a single patterning process, the common electrode is a slit electrode and separated from the active layer and the pixel electrode through the passivation layer.

公开(公告)号：US20150214286A1

公开(公告)日：2015-07-30

申请号：US14420854

申请日：2014-04-16

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jing Niu

IPC: H01L27/32 ,  H01L21/768 ,  H01L51/52 ,  H01L27/12

CPC classification number: H01L27/3276 ,  H01L27/124 ,  H01L27/1244 ,  H01L27/1259 ,  H01L27/1288 ,  H01L27/3248 ,  H01L27/3262 ,  H01L51/5284 ,  H01L2227/323

Abstract: The present disclosure provides an array substrate, including a plurality of sub-pixel regions arranged in a matrix form. Each sub-pixel region may at least include a first thin film transistor (TFT) and a second thin film transistor. The first thin film transistor may include a first gate electrode, a first source electrode and a first drain electrode. The second thin film transistor may include a second gate electrode, a second source electrode and a second drain electrode. The first gate electrode and at least one of the second source electrode and the second drain electrode may be provided on a same layer. The second gate electrode and at least one of the first source electrode and the first drain electrode may be provided on a same layer. The second gate electrode and the first source electrode may be integrated together.

Abstract translation: 本公开提供了一种阵列基板，包括以矩阵形式布置的多个子像素区域。 每个子像素区域可以至少包括第一薄膜晶体管（TFT）和第二薄膜晶体管。 第一薄膜晶体管可以包括第一栅电极，第一源电极和第一漏电极。 第二薄膜晶体管可以包括第二栅电极，第二源电极和第二漏电极。 第一栅电极和第二源电极和第二漏电极中的至少一个可以设置在同一层上。 第二栅电极和第一源极和第一漏电极中的至少一个可以设置在同一层上。 第二栅电极和第一源极可以集成在一起。

公开(公告)号：US12217633B2

公开(公告)日：2025-02-04

申请号：US17041811

申请日：2020-02-11

Applicant: BOE Technology Group Co., Ltd.

Inventor： Yanan Niu ,  Hongwei Tian ,  Zhongyuan Sun ,  Jing Niu ,  Lei Chen ,  Wei Huang ,  Zhiqiang Jiao

IPC: G09F9/30 ,  H10K71/00 ,  H10K77/10 ,  H10K102/00

Abstract: The present disclosure provides a display panel and a manufacturing method of the display panel, and a display apparatus, and belongs to the field of display technology. The display panel of the present disclosure includes a flexible substrate and a support substrate, wherein the support substrate supports the flexible substrate; a plurality of display units are provided on the flexible substrate; the display panel further includes: a first magnetic unit; a second magnetic unit; the first magnetic unit and the second magnetic unit are used for jointing the flexible substrate to the support substrate through a magnetic field therebetween.

公开(公告)号：US10241628B2

公开(公告)日：2019-03-26

申请号：US14770151

申请日：2014-12-01

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seungjin Choi ,  Jing Niu ,  Shuang Sun ,  Fangzhen Zhang

IPC: G06F3/044 ,  G03F7/20 ,  G03F7/32 ,  G06F3/041

Abstract: A touch panel, a manufacturing method thereof and a display device are provided. The touch panel includes a first touch electrode, a second touch electrode and a one-piece insulating element. The second touch electrode includes an electrode section disposed in a same layer as the first touch electrode and a connecting section under the electrode section. The electrode section includes a first electrode section and a second electrode section, which are electrically connected by the connecting section, and the connecting section is spaced apart from the first touch electrode. The insulating element includes a first insulating section between the connecting section and the first touch electrode and a second insulating section between the first electrode section and the first touch electrode and also between the second electrode section and the first touch electrode. The insulating sections can be obtained by performing a patterning process, so that the manufacturing method of the touch panel is simplified.

公开(公告)号：US09653496B2

公开(公告)日：2017-05-16

申请号：US15212871

申请日：2016-07-18

Applicant: BOE Technology Group Co., Ltd.

Inventor： Shuang Sun ,  Jing Niu ,  Fangzhen Zhang ,  Zhijun Lv

IPC: H01L21/00 ,  H01L27/00 ,  H01L29/00 ,  H01L27/12 ,  H01L29/66 ,  H01L21/28

CPC classification number: H01L27/1274 ,  H01L21/28 ,  H01L27/1222 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/6675 ,  H01L29/78621 ,  H01L29/78633

Abstract: A preparation method of a poly-silicon thin film transistor (TFT) array substrate and an array substrate thereof are provided. The preparation method includes: forming a photoresist layer on a poly-silicon layer, and exposing and developing the photoresist layer with a gray tone mask to form patterns of a photoresist completely-reserved region, a photoresist partially-reserved regions and a photoresist completely-removed region; removing part of the poly-silicon layer located in the photoresist completely-removed region, to form patterns of active layers; ashing the photoresist so as to expose part of the active layer located in the photoresist partially-reserved regions and inject P+ ions of high concentration into the part of the active layer, to form doping regions of patterns of source-drain electrodes of a P-type TFT; and stripping off remaining photoresist.

公开(公告)号：US20170110488A1

公开(公告)日：2017-04-20

申请号：US15212871

申请日：2016-07-18

Applicant: BOE Technology Group Co., Ltd.

Inventor： Shuang Sun ,  Jing Niu ,  Fangzhen Zhang ,  Zhijun Lv

IPC: H01L27/12 ,  H01L29/66

CPC classification number: H01L27/1274 ,  H01L21/28 ,  H01L27/1222 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/6675 ,  H01L29/78621 ,  H01L29/78633

Abstract: A preparation method of a poly-silicon thin film transistor (TFT) array substrate and an array substrate thereof are provided. The preparation method includes: forming a photoresist layer on a poly-silicon layer, and exposing and developing the photoresist layer with a gray tone mask to form patterns of a photoresist completely-reserved region, a photoresist partially-reserved regions and a photoresist completely-removed region; removing part of the poly-silicon layer located in the photoresist completely-removed region, to form patterns of active layers; ashing the photoresist so as to expose part of the active layer located in the photoresist partially-reserved regions and inject P+ions of high concentration into the part of the active layer, to form doping regions of patterns of source-drain electrodes of a P-type TFT; and stripping off remaining photoresist.

公开(公告)号：US20170097708A1

公开(公告)日：2017-04-06

申请号：US14771618

申请日：2014-09-26

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Choi-Seung Jin ,  Jing Niu ,  Shuang Sun ,  Fangzhen Zhang

IPC: G06F3/041 ,  C03C17/23 ,  C03C15/00

CPC classification number: G06F3/0412 ,  C03C15/00 ,  C03C17/23 ,  G06F3/044 ,  G06F2203/04103 ,  G06F2203/04111

Abstract: The present invention has disclosed a touch screen, comprising: a substrate; at least one first electrode formed on the substrate; at least one second electrode formed on the substrate, the first electrode and the second electrode having different extending directions, and there being an intersecting area between a vertical projection of the first electrode on the substrate and a vertical projection of the second electrode on the substrate; and a first protection layer formed at least at the intersecting area between the first electrode and the second electrode; wherein, the substrate is provided with a groove at the intersecting area between the first electrode and the second electrode so as to at least receive therein a portion of the first electrode located within the intersecting area. The present invention has also disclosed a display device and a method for manufacturing the touch screen. The present invention is provided to prevent two electrodes in two different layers from electrically contacting with each other and to ensure the yield of the touch screen to some extent.

公开(公告)号：US20160141425A1

公开(公告)日：2016-05-19

申请号：US14777666

申请日：2015-02-27

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Shuang Sun ,  Fangzhen Zhang ,  Jing Niu ,  Zhijun Lv

IPC: H01L29/786 ,  H01L27/12

CPC classification number: H01L29/78675 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/66757 ,  H01L29/78633 ,  H01L29/78696

Abstract: The present disclosure discloses a thin film transistor assembly, an array substrate and a method of manufacturing the same, and a display device including the array substrate. The array substrate includes a substrate; a plurality of thin film transistors formed on the substrate; and a plurality of light shielding layers, each of the light shielding layers being arranged between a source electrode and a drain electrode of the thin film transistor and configured to block light from the exterior from illuminating an active layer of the thin film transistor. The light shielding layer and the source electrode and the drain electrode of the thin film transistor are formed in the same layer on the substrate. As the light shielding layer, the source electrode and the drain electrode of the thin film transistor and a data line may be formed on the substrate by using the same material layer through a single patterning process, times of performing patterning processes and the number of masks used may be reduced and thus manufacturing process and cost of the array substrate may be decreased.

Abstract translation: 本公开公开了一种薄膜晶体管组件，阵列基板及其制造方法，以及包括阵列基板的显示装置。 阵列基板包括基板; 形成在所述基板上的多个薄膜晶体管; 和多个遮光层，每个遮光层设置在薄膜晶体管的源电极和漏电极之间，并被构造成阻挡来自外部的光照射薄膜晶体管的有源层。 薄膜晶体管的遮光层和源电极以及漏极形成在基板上的同一层中。 作为遮光层，可以通过使用相同的材​​料层，通过单一的图案化工艺，进行图案化处理的次数和掩模的数量，在基板上形成薄膜晶体管的源电极和漏电极以及数据线 可以减少使用，因此阵列基板的制造工艺和成本可能降低。