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公开(公告)号：US10148263B2
公开(公告)日：2018-12-04
申请号：US15216498
申请日：2016-07-21
Applicant: Analog Devices Global Unlimited Company
IPC: H01L29/66 , H03K17/795 , H03K19/003 , H03K17/567 , H01L27/06 , H02M7/217 , H02M7/537 , H02P27/06 , H03K17/06
Abstract: A combined isolator and power switch is disclosed. Such devices are useful in isolating low voltage components such as control compilers from motors or generators working at high voltages. The combined isolator and power switch includes circuits to transfer internal power from its low voltage side to the switch driver circuits on the high voltage side. The combined isolator and switch is compact and easy to use.
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公开(公告)号：US20170299650A1
公开(公告)日：2017-10-19
申请号：US15490584
申请日：2017-04-18
Applicant: Analog Devices Global
Inventor： Edward John Coyne , Alan J. O'Donnell , Shaun Bradley , David Aherne , David Boland , Thomas G. O'Dwyer , Colm Patrick Heffernan , Kevin B. Manning , Mark Forde , David J. Clarke , Michael A. Looby
CPC classification number: G01R31/2879 , G01R31/2874
Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.
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13.发明申请公开(公告)号：US20170134019A1
公开(公告)日：2017-05-11
申请号：US14937705
申请日：2015-11-10
Applicant: Analog Devices Global
Inventor： Edward John Coyne
IPC: H03K17/567
CPC classification number: H03K17/567 , H01L27/0266 , H01L29/735 , H03K17/165 , H03K17/168
Abstract: A transistor switch device is provided that exhibits relatively good voltage capability and relatively easy drive requirements to turn the device on and off. This can reduce transient drive current flows that may perturb other components.
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14.发明申请公开(公告)号：US20170133841A1
公开(公告)日：2017-05-11
申请号：US14937771
申请日：2015-11-10
Applicant: Analog Devices Global
Inventor： Edward John Coyne
IPC: H02H9/04 , H01L23/58 , H01L29/808 , H01L27/02 , H01L27/06
CPC classification number: H02H9/046 , H01L23/58 , H01L27/0248 , H01L27/0259 , H01L27/0266 , H01L27/0623 , H01L29/0653 , H01L29/0688 , H01L29/1066 , H01L29/8083
Abstract: Components can be damaged if they are exposed to excess voltages. A device is disclosed herein which can be placed in series with a component and a node that may be exposed to high voltages. If the voltage becomes too high, the device can autonomously switch into a relatively high impedance state, thereby protecting the other components.
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15.发明申请公开(公告)号：US20190293692A1
公开(公告)日：2019-09-26
申请号：US16360356
申请日：2019-03-21
Applicant: Analog Devices Global Unlimited Company
Inventor： David J. Clarke , Stephen Denis Heffernan , Nijun Wei , Alan J. O'Donnell , Patrick Martin McGuinness , Shaun Bradley , Edward John Coyne , David Aherne , David M. Boland
IPC: G01R19/165 , G01R31/00 , G01R31/28 , H01L23/525 , H01L27/02 , H01L23/60 , H01L23/62 , H02H9/04
Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event. The two conductive structures have facing surfaces that have different shapes;
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Patent Agency Ranking
公开(公告)号：US10338132B2
公开(公告)日：2019-07-02
申请号：US15291742
申请日：2016-10-12
Applicant: Analog Devices Global
Inventor： Edward John Coyne , Alan J. O'Donnell , Colm Patrick Heffernan , Kevin B. Manning , Mark Forde , David J. Clarke , Thomas G. O'Dwyer , David Aherne , Michael A. Looby
IPC: G01R31/28
Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring. An integrated circuit device includes a core circuit and a wear-out monitor device. The wear-out monitor device configured to adjust an indication of wear out of the core circuit regardless of whether the core circuit is activated The integrated circuit further includes a sensing circuit coupled to the wear-out monitor device and configured to detect an electrical property of the wear-out monitor device that is indicative of a wear-out level of the core-circuit.
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公开(公告)号：US20180358248A1
公开(公告)日：2018-12-13
申请号：US16005499
申请日：2018-06-11
Applicant: Analog Devices Global Unlimited Company
Inventor： Edward John Coyne
CPC classification number: H01L21/67248 , G01K3/005 , G01K3/04 , G01K7/01 , G01K13/00
Abstract: A temperature shock monitor includes a solvent material and a diffusion material. An energy barrier between the solvent material and the diffusion material is selected to be lower than is would conventionally be used in semiconductor devices such that the diffusion material diffuses into the solvent material when exposed to a temperature above a designated temperature threshold. At a later time, electrical parameters of the temperature shock monitor that change based on the amount of diffusion of the diffusion material into the solvent material allows one to determine whether the temperature shock monitor was exposed to a temperature above the temperature threshold.
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公开(公告)号：US20170299649A1
公开(公告)日：2017-10-19
申请号：US15291742
申请日：2016-10-12
Applicant: Analog Devices Global
Inventor： Edward John Coyne , Alan J. O'Donnell , Colm Patrick Heffernan , Kevin B. Manning , Mark Forde , David J. Clarke , Thomas G. O'Dwyer , David Aherne , Michael A. Looby
IPC: G01R31/26
CPC classification number: G01R31/2879 , G01R31/2874
Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring. An integrated circuit device includes a core circuit and a wear-out monitor device. The wear-out monitor device configured to adjust an indication of wear out of the core circuit regardless of whether the core circuit is activated The integrated circuit further includes a sensing circuit coupled to the wear-out monitor device and configured to detect an electrical property of the wear-out monitor device that is indicative of a wear-out level of the core-circuit.
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公开(公告)号：US20170133363A1
公开(公告)日：2017-05-11
申请号：US14937627
申请日：2015-11-10
Applicant: Analog Devices Global
Inventor： Edward John Coyne
IPC: H01L27/06 , H01L29/73 , H01L21/8234 , H01L29/417 , H01L29/66 , H01L29/08 , H01L29/78
CPC classification number: H01L27/0623 , H01L21/823475 , H01L27/0705 , H01L27/1203 , H01L29/0804 , H01L29/0821 , H01L29/41741 , H01L29/41766 , H01L29/66234 , H01L29/66666 , H01L29/7302 , H01L29/7802 , H01L29/7803 , H01L29/7809 , H01L29/7813 , H01L29/7827
Abstract: A transistor switch device is provided that exhibits relatively good voltage capability and relatively easy drive requirements to turn the device on and off. This can reduce transient drive current flows that may perturb other components.
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公开(公告)号：US20160276827A1
公开(公告)日：2016-09-22
申请号：US14658779
申请日：2015-03-16
Applicant: Analog Devices Global
Inventor： Edward John Coyne
IPC: H02H9/04
CPC classification number: H02H9/041 , H01L27/0259 , H01L27/0266 , H02H9/046
Abstract: A protection device is provided that is placed in series connection between an input or signal node and a node to be protected. If the node to be protected is a relatively high impedance node, such as the gate of a MOSFET, then the protection device need not carry much current. This enables it to be built to be very fast. This enables it to respond rapidly to an overvoltage event so as to protect the circuit connected to the node to be protected. The protection device may be used in conjunction with other protection cells that offer greater current carrying capability and controllable trigger voltages, but which are intrinsically slower acting
Abstract translation: 提供了一种保护装置，其被放置在输入或信号节点与要保护的节点之间的串联连接。 如果要保护的节点是相对较高的阻抗节点，例如MOSFET的栅极，则保护装置不需要承载很多电流。 这使它能够被构建得非常快。 这使得其能够快速响应于过电压事件，以便保护连接到要保护的节点的电路。 保护装置可以与提供更大载流能力和可控触发电压的其它保护电池结合使用，但是其本身较慢的作用
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