公开(公告)号：US20190361071A1

公开(公告)日：2019-11-28

申请号：US16513562

申请日：2019-07-16

Applicant: Analog Devices Global

Inventor： Edward John Coyne ,  Alan J. O'Donnell ,  Shaun Bradley ,  David Aherne ,  David Boland ,  Thomas G. O'Dwyer ,  Colm Patrick Heffernan ,  Kevin B. Manning ,  Mark Forde ,  David J. Clarke ,  Michael A. Looby

IPC: G01R31/28 ,  G01N27/04

Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.

公开(公告)号：US10277223B2

公开(公告)日：2019-04-30

申请号：US15370564

申请日：2016-12-06

Applicant: Analog Devices Global

Inventor： Jofrey G. Santillan ,  David Aherne

IPC: G11C27/02 ,  G06F3/042 ,  H02M3/07 ,  G01R31/30 ,  H03M1/00 ,  H03K17/16

Abstract: A charge injection compensation circuit compensates for charge injection by a field-effect transistor (FET) switch regardless of a supply voltage. The charge injection compensation circuit includes a main switch that injects charge into an electronic circuit when switched off, and a charge storage device that stores the injected charge until it can be dissipated to a dissipating node. Upon the main switch being controlled to switch off, a pulse generator circuit controls a charge storage switch to switch on to transfer the charge injected from the main switch to the charge storage device and then switch off. A dissipation circuit dissipates the charge from the charge storage device to a dissipating node.

公开(公告)号：US11193967B2

公开(公告)日：2021-12-07

申请号：US16743878

申请日：2020-01-15

Applicant: Analog Devices Global

Inventor： Alan J. O'Donnell ,  David Aherne ,  Javier Alejandro Salcedo ,  David J. Clarke ,  John A. Cleary ,  Patrick Martin McGuinness ,  Albert C. O'Grady

IPC: G01R31/00 ,  G08B21/18 ,  H02H1/00 ,  H02H9/04 ,  H02H3/20 ,  H05K1/02 ,  H02H9/00 ,  H01L27/02 ,  H02H3/04

Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.

公开(公告)号：US20210088580A1

公开(公告)日：2021-03-25

申请号：US17062225

申请日：2020-10-02

Applicant: Analog Devices Global

Inventor： Edward John Coyne ,  Alan J. O'Donnell ,  Shaun Bradley ,  David Aherne ,  David Boland ,  Thomas G. O'Dwyer ,  Colm Patrick Heffernan ,  Kevin B. Manning ,  Mark Forde ,  David J. Clarke ,  Michael A. Looby

IPC: G01R31/28 ,  G01N27/04

Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.

公开(公告)号：US10794950B2

公开(公告)日：2020-10-06

申请号：US16513562

申请日：2019-07-16

Applicant: Analog Devices Global

Inventor： Edward John Coyne ,  Alan J. O'Donnell ,  Shaun Bradley ,  David Aherne ,  David Boland ,  Thomas G. O'Dwyer ,  Colm Patrick Heffernan ,  Kevin B. Manning ,  Mark Forde ,  David J. Clarke ,  Michael A. Looby

IPC: G01R31/28 ,  G01N27/04

Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.

公开(公告)号：US10557881B2

公开(公告)日：2020-02-11

申请号：US15801132

申请日：2017-11-01

Applicant: Analog Devices Global

Inventor： Alan J. O'Donnell ,  David Aherne ,  Javier Alejandro Salcedo ,  David J. Clarke ,  John A. Cleary ,  Patrick Martin McGuinness ,  Albert C. O'Grady

IPC: G01R31/00 ,  G08B21/18 ,  H02H1/00 ,  H02H9/04 ,  H02H3/20 ,  H05K1/02 ,  H02H9/00

Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.

公开(公告)号：US10365322B2

公开(公告)日：2019-07-30

申请号：US15490584

申请日：2017-04-18

Applicant: Analog Devices Global

Inventor： Edward John Coyne ,  Alan J. O'Donnell ,  Shaun Bradley ,  David Aherne ,  David Boland ,  Thomas G. O'Dwyer ,  Colm Patrick Heffernan ,  Kevin B. Manning ,  Mark Forde ,  David J. Clarke ,  Michael A. Looby

IPC: G01R31/28

Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.

公开(公告)号：US20180276157A1

公开(公告)日：2018-09-27

申请号：US15468781

申请日：2017-03-24

Applicant: Analog Devices Global

Inventor： Wes Vernon LOFAMIA ,  Jofrey Santillan ,  David Aherne

IPC: G06F13/364 ,  G06F1/08 ,  G06F13/42 ,  G06F13/40

CPC classification number: G06F13/364 ,  G06F13/404 ,  G06F13/4282

Abstract: SPI frame for simultaneously entering 8 bit daisy-chain mode from 16 bit register addressable mode. Some products that implement SPI may be connected in a daisy chain configuration, the first slave output being connected to the second slave input, etc. The SPI port of each slave is designed to send out during the second group of clock pulses an exact copy of the data it received during the first group of clock pulses. The whole chain acts as a communication shift register; daisy chaining is often done with shift registers to provide a bank of inputs or outputs through SPI. Large latency occurs during the entry into daisy-chain mode which increases as a function of the number of linked SPI devices. A means for simultaneously instructing all connected devices to enter/enable daisy-chain mode is disclosed.

公开(公告)号：US20170299650A1

公开(公告)日：2017-10-19

申请号：US15490584

申请日：2017-04-18

Applicant: Analog Devices Global

Inventor： Edward John Coyne ,  Alan J. O'Donnell ,  Shaun Bradley ,  David Aherne ,  David Boland ,  Thomas G. O'Dwyer ,  Colm Patrick Heffernan ,  Kevin B. Manning ,  Mark Forde ,  David J. Clarke ,  Michael A. Looby

IPC: G01R31/28 ,  G01N27/04

CPC classification number: G01R31/2879 ,  G01R31/2874

Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.

公开(公告)号：US20200158771A1

公开(公告)日：2020-05-21

申请号：US16743878

申请日：2020-01-15

Applicant: Analog Devices Global

Inventor： Alan J. O'Donnell ,  David Aherne ,  Javier Alejandro Salcedo ,  David J. Clarke ,  John A. Cleary ,  Patrick Martin McGuinness ,  Albert C. O'Grady

IPC: G01R31/00 ,  G08B21/18 ,  H02H1/00 ,  H02H9/04

Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.