公开(公告)号：US10677822B2

公开(公告)日：2020-06-09

申请号：US15708958

申请日：2017-09-19

Applicant: Analog Devices Global Unlimited Company

Inventor： David J. Clarke ,  Stephen Denis Heffernan ,  Alan J. O'Donnell ,  Patrick M. McGuinness

IPC: G01R31/00 ,  G01R19/165 ,  H01L23/60 ,  H01L27/02 ,  G01R31/28 ,  G01N25/04 ,  H01L23/525 ,  H01L23/62 ,  H01L25/065

Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, a device configured to monitor electrical overstress (EOS) events includes a pair of spaced conductive structures configured to electrically arc in response to an EOS event, wherein the spaced conductive structures are formed of a material and have a shape such that arcing causes a detectable change in shape of the spaced conductive structures, and wherein the device is configured such that the change in shape of the spaced conductive structures is detectable to serve as an EOS monitor.

公开(公告)号：US10429456B2

公开(公告)日：2019-10-01

申请号：US16189854

申请日：2018-11-13

Applicant: Analog Devices Global

Inventor： Alan J. O'Donnell ,  Robert Guyol ,  Maria Jose Martinez ,  Jan Kubik ,  Padraig L. Fitzgerald ,  Javier Calpe Maravilla ,  Michael P. Lynch ,  Eoin E. English

IPC: G01R33/09 ,  H01F17/00 ,  H01L43/08 ,  B81B3/00

Abstract: A magnetic device may include a magnetic structure, a device structure, and an associated circuit. The magnetic structure may include a patterned layer of material having a predetermined magnetic property. The patterned layer may be configured to, e.g., provide a magnetic field, sense a magnetic field, channel or concentrate magnetic flux, shield a component from a magnetic field, or provide magnetically actuated motion, etc. The device structure may be another structure of the device that is physically connected to or arranged relative to the magnetic structure to, e.g., structurally support, enable operation of, or otherwise incorporate the magnetic structure into the magnetic device, etc. The associated circuit may be electrically connected to the magnetic structure to receive, provide, condition or process of signals of the magnetic device.

公开(公告)号：US20190178953A1

公开(公告)日：2019-06-13

申请号：US16189854

申请日：2018-11-13

Applicant: Analog Devices Global

Inventor： Alan J. O'Donnell ,  Robert Guyol ,  Maria Jose Martinez ,  Jan Kubik ,  Padraig L. Fitzgerald ,  Javier Calpe Maravilla ,  Michael P. Lynch ,  Eoin E. English

IPC: G01R33/09 ,  H01F17/00 ,  H01L43/08 ,  B81B3/00

CPC classification number: G01R33/09 ,  B81B3/00 ,  B81B3/0091 ,  H01F17/0006 ,  H01F17/0033 ,  H01F2017/0066 ,  H01L43/08

Abstract: A magnetic device may include a magnetic structure, a device structure, and an associated circuit. The magnetic structure may include a patterned layer of material having a predetermined magnetic property. The patterned layer may be configured to, e.g., provide a magnetic field, sense a magnetic field, channel or concentrate magnetic flux, shield a component from a magnetic field, or provide magnetically actuated motion, etc. The device structure may be another structure of the device that is physically connected to or arranged relative to the magnetic structure to, e.g., structurally support, enable operation of, or otherwise incorporate the magnetic structure into the magnetic device, etc. The associated circuit may be electrically connected to the magnetic structure to receive, provide, condition or process of signals of the magnetic device.

公开(公告)号：US20180088155A1

公开(公告)日：2018-03-29

申请号：US15708958

申请日：2017-09-19

Applicant: Analog Devices Global Unlimited Company

Inventor： David J. Clarke ,  Stephen Denis Heffernan ,  Alan J. O'Donnell ,  Patrick M. McGuinness

IPC: G01R19/165 ,  H01L23/62 ,  H01L23/525 ,  G01N25/04 ,  G01R31/28

Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, a device configured to monitor electrical overstress (EOS) events includes a pair of spaced conductive structures configured to electrically arc in response to an EOS event, wherein the spaced conductive structures are formed of a material and have a shape such that arcing causes a detectable change in shape of the spaced conductive structures, and wherein the device is configured such that the change in shape of the spaced conductive structures is detectable to serve as an EOS monitor.

公开(公告)号：US11193967B2

公开(公告)日：2021-12-07

申请号：US16743878

申请日：2020-01-15

Applicant: Analog Devices Global

Inventor： Alan J. O'Donnell ,  David Aherne ,  Javier Alejandro Salcedo ,  David J. Clarke ,  John A. Cleary ,  Patrick Martin McGuinness ,  Albert C. O'Grady

IPC: G01R31/00 ,  G08B21/18 ,  H02H1/00 ,  H02H9/04 ,  H02H3/20 ,  H05K1/02 ,  H02H9/00 ,  H01L27/02 ,  H02H3/04

Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.

公开(公告)号：US20210088580A1

公开(公告)日：2021-03-25

申请号：US17062225

申请日：2020-10-02

Applicant: Analog Devices Global

Inventor： Edward John Coyne ,  Alan J. O'Donnell ,  Shaun Bradley ,  David Aherne ,  David Boland ,  Thomas G. O'Dwyer ,  Colm Patrick Heffernan ,  Kevin B. Manning ,  Mark Forde ,  David J. Clarke ,  Michael A. Looby

IPC: G01R31/28 ,  G01N27/04

Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.

公开(公告)号：US10794950B2

公开(公告)日：2020-10-06

申请号：US16513562

申请日：2019-07-16

Applicant: Analog Devices Global

Inventor： Edward John Coyne ,  Alan J. O'Donnell ,  Shaun Bradley ,  David Aherne ,  David Boland ,  Thomas G. O'Dwyer ,  Colm Patrick Heffernan ,  Kevin B. Manning ,  Mark Forde ,  David J. Clarke ,  Michael A. Looby

IPC: G01R31/28 ,  G01N27/04

Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.

公开(公告)号：US10557881B2

公开(公告)日：2020-02-11

申请号：US15801132

申请日：2017-11-01

Applicant: Analog Devices Global

Inventor： Alan J. O'Donnell ,  David Aherne ,  Javier Alejandro Salcedo ,  David J. Clarke ,  John A. Cleary ,  Patrick Martin McGuinness ,  Albert C. O'Grady

IPC: G01R31/00 ,  G08B21/18 ,  H02H1/00 ,  H02H9/04 ,  H02H3/20 ,  H05K1/02 ,  H02H9/00

Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.

公开(公告)号：US20190319011A1

公开(公告)日：2019-10-17

申请号：US16366476

申请日：2019-03-27

Applicant: ANALOG DEVICES GLOBAL UNLIMITED COMPANY

Inventor： Rigan McGeehan ,  Cillian Burke ,  Alan J. O'Donnell

IPC: H01L25/065 ,  H01L21/304 ,  H01L21/78 ,  H01L23/00 ,  H01L25/00

Abstract: An integrated device package is disclosed. The package can include a carrier and an integrated device die having a front side and a back side. A mounting structure can serve to mount the back side of the integrated device die to the carrier. The mounting structure can comprise a first layer over the carrier and a second element between the back side of the integrated device die and the first layer. The first layer can comprise a first insulating material that adheres to the carrier, and the second element can comprise a second insulating material.

公开(公告)号：US10365322B2

公开(公告)日：2019-07-30

申请号：US15490584

申请日：2017-04-18

Applicant: Analog Devices Global

Inventor： Edward John Coyne ,  Alan J. O'Donnell ,  Shaun Bradley ,  David Aherne ,  David Boland ,  Thomas G. O'Dwyer ,  Colm Patrick Heffernan ,  Kevin B. Manning ,  Mark Forde ,  David J. Clarke ,  Michael A. Looby

IPC: G01R31/28

Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.