公开(公告)号：US20200258744A1

公开(公告)日：2020-08-13

申请号：US16442797

申请日：2019-06-17

Applicant: Applied Materials, Inc.

Inventor： Gaurav THAREJA ,  Keyvan KASHEFIZADEH ,  Xikun WANG ,  Anchuan WANG ,  Sanjay NATARAJAN ,  Sean M. SEUTTER ,  Dong Wu

IPC: H01L21/28 ,  H01L21/283 ,  H01L29/49 ,  H01L29/45

Abstract: A semiconductor device fabrication process includes forming gates on a substrate having a plurality of openings, each gate having a conducting layer a first metal and a gate dielectric layer of a first dielectric material, partially filling the openings with a second dielectric material, forming a first structure on the substrate in a processing system without breaking vacuum, depositing a third dielectric material over the first structure, and forming a planarized surface of the gates and a surface of the third dielectric material that is disposed over the first structure. The forming of the first structure includes forming trenches by removing second portions of the second dielectric material within each opening, forming recessed active regions in the trenches by partially filling the trenches with a second metal, forming a liner over each recessed active region, and forming a metal cap layer over each liner.

公开(公告)号：US20180182777A1

公开(公告)日：2018-06-28

申请号：US15855465

申请日：2017-12-27

Applicant: Applied Materials, Inc.

Inventor： Zhenjiang CUI ,  Hanshen ZHANG ,  Anchuan WANG ,  Zhijun CHEN ,  Nitin K. INGLE

IPC: H01L27/11582 ,  H01L21/311 ,  H01L21/3213 ,  H01L23/31 ,  H01L23/29 ,  H01L27/11556 ,  H01L21/67

Abstract: Embodiments of the present disclosure provide methods for forming features in a film stack. The film stack may be utilized to form stair-like structures with accurate profiles control in manufacturing three dimensional (3D) stacking of semiconductor chips. In one example, a method includes exposing a substrate having a multi-material layer formed thereon to radicals of a remote plasma to form one or more features through the multi-material layer, the one or more features exposing a portion of a top surface of the substrate, and the multi-material layer comprising alternating layers of a first layer and a second layer, wherein the remote plasma is formed from an etching gas mixture comprising a fluorine-containing chemistry, and wherein the process chamber is maintained at a pressure of about 2 Torr to about 20 Torr and a temperature of about −100° C. to about 100° C.

公开(公告)号：US20140271097A1

公开(公告)日：2014-09-18

申请号：US14188344

申请日：2014-02-24

Applicant: APPLIED MATERIALS, INC.

Inventor： Anchuan WANG ,  Xinglong CHEN ,  Zihui LI ,  Hiroshi HAMANA ,  Zhijun CHEN ,  Ching-Mei HSU ,  Jiayin HUANG ,  Nitin K. INGLE ,  Dmitry LUBOMIRSKY ,  Shankar VENKATARAMAN ,  Randhir THAKUR

IPC: H01L21/677

CPC classification number: H01L21/324 ,  C23C16/4405 ,  H01J37/32357 ,  H01J37/32862 ,  H01L21/02041 ,  H01L21/02057 ,  H01L21/0206 ,  H01L21/263 ,  H01L21/2686 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/32136 ,  H01L21/32137 ,  H01L21/67069 ,  H01L21/67075 ,  H01L21/6708 ,  H01L21/67109 ,  H01L21/67115 ,  H01L21/67184 ,  H01L21/6719 ,  H01L21/67196 ,  H01L21/67201 ,  H01L21/67207 ,  H01L21/67248 ,  H01L21/67253 ,  H01L21/67288 ,  H01L21/67703 ,  H01L21/67739 ,  H01L21/67742 ,  H01L21/6831

Abstract: Systems, chambers, and processes are provided for controlling process defects caused by moisture contamination. The systems may provide configurations for chambers to perform multiple operations in a vacuum or controlled environment. The chambers may include configurations to provide additional processing capabilities in combination chamber designs. The methods may provide for the limiting, prevention, and correction of aging defects that may be caused as a result of etching processes performed by system tools.

Abstract translation: 提供系统，室和过程以控制由水分污染引起的过程缺陷。 这些系统可以提供腔室的配置，以在真空或受控环境中执行多个操作。 腔室可以包括在组合腔室设计中提供附加处理能力的构造。 这些方法可以提供由系统工具执行的蚀刻工艺可能引起的老化缺陷的限制，预防和校正。