公开(公告)号：US20210202477A1

公开(公告)日：2021-07-01

申请号：US16953350

申请日：2020-11-20

Applicant: ADVANTEST CORPORATION ,  Tokyo Institute of Technology

Inventor： Shinji SUGATANI ,  Takayuki OHBA

IPC: H01L27/06 ,  H01L25/065 ,  H01L23/538 ,  H01L21/66 ,  G11C29/12 ,  H01L21/50

Abstract: When testing a memory chip, the memory chip is determined to be defective if even a portion of the memory chip is defective, and is discarded, which lowers the yield of the three-dimensional memory device. A three-dimensional device is provided comprising a plurality of stacked circuit chips each having one or more circuit blocks in each of a plurality of divided regions obtained by dividing a circuit plane and an interconnect portion communicatively connected, for each group of circuit blocks included in each of the divided regions overlapping in a stacking direction in the plurality of circuit chips, to a predetermined number of circuit blocks sorted from the circuit blocks within the group.

公开(公告)号：US20190337085A1

公开(公告)日：2019-11-07

申请号：US16344359

申请日：2017-01-12

Applicant: ADVANTEST CORPORATION

Inventor： Shinichi HAMAGUCHI ,  Shinji SUGATANI ,  Masayuki TAKAHASHI ,  Masahiro TAKIZAWA

IPC: B23K15/00 ,  H01J37/147 ,  H01J37/305 ,  H01J37/06 ,  H01J37/141 ,  B33Y10/00 ,  B33Y30/00 ,  B33Y50/02

Abstract: To provide a three-dimensional printing device that irradiates approximately the same ranges on the surface of a powder layer simultaneously with a plurality of electron beams having different beam shapes. An electron beam column 200 of the three-dimensional printing device 100 includes a plurality of electron sources 20 including electron sources having anisotropically-shaped beam generating units, and beam shape deforming elements 30 that deform the beam shapes of electron beams output from the electron sources 20 on a surface 63 of a powder layer 62. A deflector 50 included in the electron beam column 200 deflects an electron beam output from each of the plurality of electron sources 20 by a distance larger than the beam space between electron beams before passing through the deflector 50.

公开(公告)号：US20250031455A1

公开(公告)日：2025-01-23

申请号：US18908714

申请日：2024-10-07

Applicant: ADVANTEST CORPORATION ,  ISTITUTE OF SCIENCE TOKYO

Inventor： Shinji SUGATANI ,  Takayuki OHBA

IPC: H01L27/06 ,  G11C29/12 ,  H01L21/50 ,  H01L21/66 ,  H01L23/538 ,  H01L25/065

Abstract: When testing a memory chip, the memory chip is determined to be defective if even a portion of the memory chip is defective, and is discarded, which lowers the yield of the three-dimensional memory device. A three-dimensional device is provided comprising a plurality of stacked circuit chips each having one or more circuit blocks in each of a plurality of divided regions obtained by dividing a circuit plane and an interconnect portion communicatively connected, for each group of circuit blocks included in each of the divided regions overlapping in a stacking direction in the plurality of circuit chips, to a predetermined number of circuit blocks sorted from the circuit blocks within the group.

公开(公告)号：US20240136314A1

公开(公告)日：2024-04-25

申请号：US18450435

申请日：2023-08-15

Applicant: ADVANTEST CORPORATION ,  Tokyo Institute of Technology

Inventor： Shinji SUGATANI ,  Takayuki OHBA ,  Norio CHUJO ,  Koji SAKUI ,  Tadashi FUKUDA

IPC: H01L23/00 ,  H01L21/768 ,  H01L23/48 ,  H01L23/522

CPC classification number: H01L24/08 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5226 ,  H01L24/80 ,  H01L2224/08145 ,  H01L2224/80895 ,  H01L2224/80896

Abstract: A stacked chip is provided comprising a first semiconductor chip and a second semiconductor chip, wherein the first semiconductor chip has a first supporting substrate and a first circuit layer including a first region in which a first circuit is formed and a second region in which a second circuit is formed, the second semiconductor chip has a second supporting substrate, a second circuit layer including a third region that corresponds to a position of the first region and a fourth region that corresponds to a position of the second region and in which the second circuit is formed, a first embedded portion embedded in a first hole portion penetrating through the third region and extending to an inside of the second supporting substrate, and a first through via that penetrates through the first embedded portion and the second supporting substrate, and is electrically conducted with the first circuit.

公开(公告)号：US20190118287A1

公开(公告)日：2019-04-25

申请号：US16127225

申请日：2018-09-11

Applicant: ADVANTEST CORPORATION

Inventor： Shinji SUGATANI ,  Shigeki NISHINA ,  Jun MATSUMOTO ,  Masahiro TAKIZAWA ,  Minoru SOMA ,  Akio YAMADA

IPC: B23K15/00 ,  B33Y10/00 ,  B33Y30/00 ,  B33Y50/02 ,  B28B1/00 ,  B28B17/00

Abstract: Provided is a three-dimensional laminating and shaping apparatus 100 including a column unit 200 that is configured to output an electron beam EB and deflect the electron beam EB toward the front surface of a powder layer 32, an insulating portion that electrically insulates a three-dimensional structure 36 from a ground potential member, an ammeter 73 that is configured to measure the current value indicative of the current flowing into the ground after passing through the three-dimensional structure 36, a melting judging unit 410 that is configured to detect that the powder layer 32 is melted based on the current value measured by the ammeter 73 and generate a melting signal, and a deflection controller 420 that is configured to receive the melting signal to determine the condition for the irradiation with the electron beam.

公开(公告)号：US20160314930A1

公开(公告)日：2016-10-27

申请号：US15099619

申请日：2016-04-15

Applicant: ADVANTEST CORPORATION

Inventor： Akio YAMADA ,  Shinji SUGATANI ,  Masaki KUROKAWA ,  Masahiro TAKIZAWA ,  Ryuma IWASHITA

IPC: H01J37/147 ,  H01J37/317 ,  H01J37/304

Abstract: To realize a multi-beam formation device that can stably machine a fine pattern using complementary lithography, provided is a device that deforms and deflects a beam, including an aperture layer having a first aperture that deforms and passes a beam incident thereto from a first surface side of the device and a deflection layer that passes and deflects the beam that has been passed by the aperture layer. The deflection layer includes a first electrode section having a first electrode facing a beam passing space in the deflection layer corresponding to the first aperture and a second electrode section having an extending portion that extends toward the beam passing space and is independent from an adjacent layer in the deflection layer and a second electrode facing the first electrode in a manner to sandwich the beam passing space between the first electrode and an end portion of the second electrode.

Abstract translation: 为了实现能够使用互补光刻来稳定地加工精细图案的多光束形成装置，提供了一种使光束变形和偏转的装置，该光束包括具有第一孔径的开口层，该第一孔使得从第一表面 该偏转层使通过孔径层的光束通过并偏转。 偏转层包括第一电极部分，其具有面对对应于第一孔的偏转层中的光束通过空间的第一电极和具有朝向光束通过空间延伸的延伸部分的第二电极部分，并且独立于邻近层 偏转层和面对第一电极的第二电极，以夹住第一电极和第二电极的端部之间的光束通过空间。

公开(公告)号：US20160062249A1

公开(公告)日：2016-03-03

申请号：US14738934

申请日：2015-06-15

Applicant: ADVANTEST CORPORATION

Inventor： Akio YAMADA ,  Shinji SUGATANI

IPC: G03F7/20 ,  G03F9/00

CPC classification number: G03F7/70425 ,  G03F9/7088 ,  H01J37/3174

Abstract: An exposure apparatus is configured to include an electronic optical system 108 that generates an electron ray and irradiates a wafer W with the electron ray, a wafer stage WS that holds the wafer W, and an electron detector 44 and a fog preventing mechanism 70 that are placed between the electronic optical system 108 and the wafer stage WS. A substrate 71 constitutes the fog preventing mechanism 70, and opening holes 71a0 that penetrate up to the upper surface of the substrate 71 are formed in a first area of the bottom surface of the substrate 71, and opening holes 71a0 that are closed in the substrate 71 are formed in a second area of the bottom surface.

Abstract translation: 曝光装置被配置为包括产生电子射线并用电子射线照射晶片W的电子光学系统108，保持晶片W的晶片载台WS，以及电子检测器44和防雾机构70 放置在电子光学系统108和晶片台WS之间。 基板71构成防雾机构70，在基板71的底面的第一区域形成贯通基板71的上表面的开孔71a0，在基板71的基板上封闭的开孔71a0 71形成在底面的第二区域中。