摘要:
An adjustable, segmented amplifier including (i) a first fixed stage configured to amplify an analog signal in accordance with a fixed amplification, and provide the analog signal amplified in accordance with the fixed amplification to a first common node. The adjustable, segmented amplifier further includes an adjustable stage comprising a plurality of independently selectable parallel amplifier segments, wherein the adjustable stage is configured to (i) amplify the analog signal provided to the first common node in accordance with an adjustable amplification that is adjustable depending upon a number of the independently selectable parallel amplifier segments having been selected to amplify the analog signal provided to the first common node, and (ii) provide the analog signal amplified in accordance with the fixed amplification and amplified in accordance with the adjustable amplification to the second common node.
摘要:
A receiver includes a Gilbert cell mixer comprising an input transconductance stage. The input transconductance stage includes first and second transistors receiving an input signal and providing a first gain characteristic that is substantially non-linear over an operating frequency range of the receiver. Third and fourth transistors receive the input signal and provide a second gain characteristic that is substantially non-linear over the operating range of the receiver. A combined gain characteristic of the input transconductance stage is based on the first and second gain characteristics and is substantially linear over the operating frequency range of the receiver.
摘要:
A packet-based wireless transceiver that transmits and receives data packets comprises a receiver including a mixer that converts signal frequencies and a baseband circuit that communicates with the mixer and that includes an amplifier. A receiver voltage offset calibration circuit adjusts a receiver voltage offset at the baseband circuit at times synchronized with the data packets and includes a calibration signal generator that outputs calibration signals to first and second inputs of the baseband circuit and a calibration adjustment circuit that communicates with the calibration signal generator and that adjusts the calibration signal to reduce the voltage offset based on an output of the amplifier.
摘要:
A system comprises a variable gain amplifier (VGA) that amplifies an input signal with a gain that is based on a gain control signal. A power amplifier receives an output of the VGA. Memory switches between at least two of N output power settings each including a predetermined reference value and a predetermined gain offset value. The memory substantially concurrently changes from the predetermined reference value and the predetermined gain offset value of a prior one of the N output power settings to the predetermined reference value and the predetermined gain offset value of a current one of the N output power settings, where N is an integer greater than one. A gain control adjuster adjusts the gain control signal based on an output of the power amplifier and the predetermined reference value and gain offset value of the current one of the N output power settings.
摘要:
A method for reducing a parasitic capacitance of an electrostatic discharge (ESD) protection circuit for an integrated circuit (IC) includes providing an ESD protection circuit including a plurality of transistors; coupling one end of a resistor to a shared drain of the plurality of transistors; and coupling an opposite end of the resistor to at least one of an input pad of the IC, a blocking capacitor of the IC and a transistor in the IC.
摘要:
Apparatus, systems, and methods implementing techniques for filtering signals are described. A filter circuit receives an input signal and produces a corresponding filtered signal. The filter circuit has a transfer function that relates the filtered signal to the input signal. The transfer function includes at least one pole and at least one zero, where at least one of the zeros corresponds to a first frequency, and at least one of the poles corresponds to a second frequency. The apparatus also includes a negative-transconductance circuit that is coupled to the filter circuit and that increases a magnitude of a component of the filtered signal that corresponds to the second frequency.
摘要:
A gain calibration circuit comprises a generator that generates a constant overdrive voltage that biases a radio frequency (RF) mixer. A reference signal generator generates a reference signal. A comparator receives the reference signal and a second signal that is a function of a mixer bias current flowing through the RF mixer and that generates a difference signal. An adjustment circuit adjusts a transconductance gain of the RF mixer based on the difference signal.
摘要:
A bias circuit for biasing a linear input stage of an amplifier comprises a first MOS device having a size. A second MOS device has a size and is arranged with the first MOS device in a cascode configuration. The second MOS device is operated in a saturation region. A third MOS device has a size and biases the first MOS device in a triode region. A bias switch ratio of the size of the first MOS device to the size of the third MOS device is greater than one.
摘要:
A packet-based wireless transceiver that transmits and receives data packets includes a transceiver component having an adjustable performance parameter. A calibration circuit adjusts the performance parameter of the transceiver component at times synchronized with the data packets. A calibration signal generator generates calibration signals based on the performance parameter and outputs the calibration signals to the transceiver component. A comparator receives the outputs of the transceiver component and generates a difference signal. A calibration adjustment circuit communicates with the calibration signal generator and the comparator and adjusts the performance parameter to reduce the difference signal. Alternately, a reference signal generator generates a reference signal. A comparator receives the reference signal and a second signal from the transceiver component and generates a difference signal. A calibration adjustment circuit adjusts the performance parameter of the transceiver to reduce the difference signal.
摘要:
An impedance matching circuit is provided for an IC arranged on a package that matches an impedance of an external load. The circuit includes a package, an IC that is arranged on the package, and an impedance matching circuit. The impedance matching circuit includes a first bondwire arranged on the package that has one end that communicates with the external load and an opposite end that communicates with said IC, a capacitance element arranged on the IC, and a second bondwire arranged on the package that has one end that communicates with the external load and an opposite end that communicates with one end of said capacitance element.