公开(公告)号：US20160261886A1

公开(公告)日：2016-09-08

申请号：US15060273

申请日：2016-03-03

Applicant: QUALCOMM Incorporated

Inventor： Jaehong Chon ,  In Suk Chong ,  Wei-Jung Chien ,  Xianglin Wang ,  Marta Karczewicz

IPC: H04N19/593 ,  H04N19/119 ,  H04N19/139 ,  H04N19/423 ,  H04N19/147 ,  H04N19/70 ,  H04N19/11 ,  H04N19/176

CPC classification number: H04N19/139 ,  H04N19/103 ,  H04N19/107 ,  H04N19/119 ,  H04N19/147 ,  H04N19/176 ,  H04N19/19 ,  H04N19/513 ,  H04N19/61

Abstract: To encode video data, a video encoder partitions a 2N×2N block of video data into four N×N blocks, determines encoding modes for each of the four N×N blocks, calculates values representative of encoded versions of the four N×N blocks using the encoding modes for each of the four N×N blocks, determines whether to skip testing of at least one non-square partitioning mode for the 2N×2N block based on the calculated values, and encodes the 2N×2N block based at least in part on the determination of whether to skip testing of the at least one non-square partitioning mode.

Abstract translation: 为了对视频数据进行编码，视频编码器将2N×2N视频数据块划分为四个N×N块，确定四个N×N块中的每一个的编码模式，计算表示四个N×N块的编码版本的值 使用四个N×N块中的每一个的编码模式，基于计算出的值来确定是否跳过用于2N×2N块的至少一个非平方分割模式的测试，并且至少编码2N×2N块 部分地决定是否跳过对至少一个非平方分区模式的测试。

公开(公告)号：US20160261882A1

公开(公告)日：2016-09-08

申请号：US14710967

申请日：2015-05-13

Applicant: QUALCOMM Incorporated

Inventor： Wei-Jung Chien ,  Xianglin Wang ,  Xin Zhao

IPC: H04N19/52 ,  H04N19/523

CPC classification number: H04N19/523 ,  H04N19/105 ,  H04N19/117 ,  H04N19/176 ,  H04N19/182 ,  H04N19/59 ,  H04N19/80

Abstract: This disclosure provides systems and methods for low complexity quarter pel generation in motion search for video coding. The method can include storing full-pixel position information related to a plurality of rows of video information of a reference frame in a memory. The method can also include applying a vertical interpolation filter to the full-pixel position information for video information related to the reference frame to determine a first sub-pel position information. The method can also include applying a horizontal interpolation filter to the first sub-pel position information to determine a second sub-pel position information for the every other row of video data. The method can also include generating a syntax element indicating pixel motion of a current frame based on the first sub-pel position information. The method can also include encoding a block based on the generated syntax element.

Abstract translation: 本公开提供了用于视频编码的运动搜索中的低复杂度四分之一像素生成的系统和方法。 该方法可以包括将与参考帧的多行视频信息相关的全像素位置信息存储在存储器中。 该方法还可以包括将垂直内插滤波器应用于与参考帧相关的视频信息的全像素位置信息，以确定第一子像素位置信息。 该方法还可以包括对第一子像素位置信息应用水平内插滤波器以确定每隔一行视频数据的第二子像素位置信息。 该方法还可以包括基于第一子像素位置信息生成指示当前帧的像素运动的语法元素。 该方法还可以包括基于生成的语法元素对块进行编码。

公开(公告)号：US09432696B2

公开(公告)日：2016-08-30

申请号：US14216086

申请日：2014-03-17

Applicant: QUALCOMM Incorporated

Inventor： In Suk Chong ,  Yang Yu ,  Xianglin Wang ,  Marta Karczewicz

IPC: H04N19/61 ,  H04N19/186 ,  H04N19/182 ,  H04N19/176 ,  H04N19/18 ,  H04N19/122 ,  H04N19/132

CPC classification number: H04N19/61 ,  H04N19/122 ,  H04N19/132 ,  H04N19/14 ,  H04N19/176 ,  H04N19/18

Abstract: Systems and methods for low complexity forward transforms using zeroed-out coefficients are described herein. One aspect of the subject matter described in the disclosure provides a video encoder comprising a memory configured to store a video block. The video encoder further comprises a processor in communication with the memory. The processor is configured to determine a full power value of the video block. The processor is further configured to determine a reduced transform coefficient matrix, wherein the reduced transform coefficient matrix comprises an inner region of zero or non-zero values of the same inner region of a full transform coefficient matrix and an outer region of zero values, wherein the reduced transform coefficient matrix and the full transform coefficient matrix have the same size. The processor is further configured to determine a partial power value of the video block using the reduced transform coefficient matrix. The processor is further configured to transform the video block from a pixel domain to a coefficient domain using the reduced transform coefficient matrix based on the full power value and partial power value. The processor is further configured to encode the transformed video block.

Abstract translation: 本文描述了使用零缺失系数的低复杂度正向变换的系统和方法。 在本公开中描述的主题的一个方面提供了一种视频编码器，其包括被配置为存储视频块的存储器。 视频编码器还包括与存储器通信的处理器。 处理器被配置为确定视频块的全功率值。 处理器还被配置为确定缩小的变换系数矩阵，其中所述经简化的变换系数矩阵包括全变换系数矩阵和零值的外部区域的相同内部区域的零或非零值的内部区域，其中 减小的变换系数矩阵和全变换系数矩阵具有相同的大小。 处理器还被配置为使用缩减的变换系数矩阵来确定视频块的部分功率值。 处理器还被配置为使用基于全功率值和部分功率值的减小的变换系数矩阵将视频块从像素域变换到系数域。 处理器还被配置为对经变换的视频块进行编码。

公开(公告)号：US09420285B2

公开(公告)日：2016-08-16

申请号：US13860442

申请日：2013-04-10

Applicant: QUALCOMM Incorporated

Inventor： Chengjie Tu ,  Xianglin Wang ,  Marta Karczewicz

IPC: H04N19/159 ,  H04N19/103 ,  H04N19/187 ,  H04N19/50 ,  H04N19/52 ,  H04N19/176 ,  H04N19/30 ,  H04N19/196

CPC classification number: H04N19/50 ,  H04N19/103 ,  H04N19/159 ,  H04N19/176 ,  H04N19/187 ,  H04N19/196 ,  H04N19/30 ,  H04N19/52

Abstract: In some embodiments of a video coder, if some prediction information is not available for a first block in a current layer, the video coder uses corresponding information (e.g., intra prediction direction and motion information), if available, from the first block's co-located second block in the base layer as if it were the prediction information for the first block. The corresponding information can then be used in the current layer to determine the prediction information of succeeding blocks in the current layer.

Abstract translation: 在视频编码器的一些实施例中，如果某些预测信息对于当前层中的第一块不可用，则视频编码器使用相应的信息（例如，帧内预测方向和运动信息）（如果可用） 位于基本层中的第二块，就像它是第一块的预测信息一样。 然后可以在当前层中使用相应的信息来确定当前层中的后续块的预测信息。

公开(公告)号：US09392274B2

公开(公告)日：2016-07-12

申请号：US13838270

申请日：2013-03-15

Applicant: QUALCOMM Incorporated

Inventor： Xianglin Wang ,  Marta Karczewicz

IPC: H04N7/26 ,  H04N19/30 ,  H04N19/105 ,  H04N19/176 ,  H04N19/154 ,  H04N19/187 ,  H04N19/167 ,  H04N19/46 ,  H04N19/33 ,  H04N19/59

CPC classification number: H04N19/30 ,  H04N19/105 ,  H04N19/154 ,  H04N19/167 ,  H04N19/176 ,  H04N19/187 ,  H04N19/33 ,  H04N19/46 ,  H04N19/59

Abstract: An apparatus for coding video information according to certain aspects is disclosed. Multi-layer video steams including a base layer and an enhancement layer can be coded. Predictors generated for the base layer and the enhancement layer can be combined to form a final predictor of the enhancement layer. Each predictor can be weighted such that those predictors which are more likely to produce high quality results can be factored more heavily in the final predictor. The conditions upon which the respective weights for enhancement layer predictors and base layer predictors are determined may be implicitly derived from the predictors or characteristics thereof. Alternatively, data may be generated explicating indicating the weights or providing information from which the weights can be determined.

Abstract translation: 公开了一种根据某些方面对视频信息进行编码的装置。 可以编码包括基本层和增强层的多层视频流。 为基层和增强层生成的预测器可以组合以形成增强层的最终预测器。 每个预测器都可以被加权，使得最有可能产生高质量结果的那些预测变量在最终预测器中可以被更多地考虑在内。 确定增强层预测器和基础层预测器的相应权重的条件可以从预测器或其特征隐含地导出。 或者，可以生成说明表示权重的信息或提供可以从其确定权重的信息。

公开(公告)号：US09219913B2

公开(公告)日：2015-12-22

申请号：US13914387

申请日：2013-06-10

Applicant: QUALCOMM Incorporated

Inventor： Chengjie Tu ,  Xianglin Wang ,  Jianle Chen ,  Liwei Guo ,  Marta Karczewicz

IPC: H04N7/26 ,  H04N19/39 ,  H04N19/105 ,  H04N19/30 ,  H04N19/187 ,  H04N19/44

CPC classification number: H04N19/39 ,  H04N19/105 ,  H04N19/187 ,  H04N19/30 ,  H04N19/44

Abstract: An apparatus for coding video data using a single-loop decoding approach may include a memory unit and a processor in communication with the memory unit. In an example, the memory unit stores the video data, the video data including a base layer and an enhancement layer. The base layer includes a base layer block, a non-constrained INTRA mode block, and an INTER mode block. The base layer block includes a sub-block located at least partially within one of the non-constrained INTRA mode block or the INTER mode block. The enhancement layer includes an enhancement layer block located at a position in the enhancement layer corresponding to a position of the base layer block in the base layer. The processor approximates pixel values of the sub-block and determines, based at least in part on the approximated pixel values, pixel values of the enhancement layer block.

Abstract translation: 使用单循环解码方法对视频数据进行编码的装置可以包括与存储器单元通信的存储器单元和处理器。 在一个示例中，存储单元存储视频数据，视频数据包括基本层和增强层。 基本层包括基本层块，非约束INTRA模式块和INTER模式块。 基层块包括至少部分地位于非约束INTRA模块或INTER模块之一内的子块。 增强层包括位于增强层中位于基层中的基层块的位置的增强层块。 处理器近似子块的像素值，并且至少部分地基于近似像素值确定增强层块的像素值。

公开(公告)号：US20150264367A1

公开(公告)日：2015-09-17

申请号：US14216205

申请日：2014-03-17

Applicant: QUALCOMM Incorporated

Inventor： In Suk CHONG ,  Sungwon Lee ,  Xianglin Wang ,  Marta Karczewicz

IPC: H04N19/23 ,  H04N19/174

CPC classification number: H04N19/23 ,  H04N19/103 ,  H04N19/137 ,  H04N19/174 ,  H04N19/176 ,  H04N19/557

Abstract: Systems and methods for low complexity encoding and background detection are described herein. One aspect of the subject matter described in the disclosure provides a video encoder comprising a memory configured to store a video block. The video encoder further comprises a processor in communication with the memory. The processor is configured to determine whether the video block is background by comparing the video block to a corresponding block located in a previous temporal frame. The processor is further configured to determine, when the video block is not background, whether one or more sub-blocks of the video block are background by comparing the sub-blocks to corresponding sub-blocks located in the previous temporal frame.

Abstract translation: 本文描述了用于低复杂度编码和背景检测的系统和方法。 在本公开中描述的主题的一个方面提供了一种视频编码器，其包括被配置为存储视频块的存储器。 视频编码器还包括与存储器通信的处理器。 处理器被配置为通过将视频块与位于先前时间帧中的对应块进行比较来确定视频块是否是背景。 处理器还被配置为通过将子块与位于先前时间帧中的对应子块进行比较来确定何时视频块不是背景，视频块的一个或多个子块是否是背景。

公开(公告)号：US20130215974A1

公开(公告)日：2013-08-22

申请号：US13773151

申请日：2013-02-21

Applicant: QUALCOMM Incorporated

Inventor： In Suk Chong ,  Xianglin Wang ,  Marta Karczewicz

IPC: H04N7/26

CPC classification number: H04N19/40 ,  H04N19/463 ,  H04N19/82 ,  H04N19/91

Abstract: Techniques for coding video data include coding sample adaptive offset (SAO) offset values as part of performing a video coding process. In particular, the techniques include determining the SAO offset values according to a SAO process. The techniques further include storing a codebook defining a plurality of codes for coding different variations of SAO offset values. The techniques also include coding the SAO offset values in accordance with the codebook so as to specify the SAO offset values as one of the plurality of codes defined by the codebook.

Abstract translation: 用于编码视频数据的技术包括编码样本自适应偏移（SAO）偏移值作为执行视频编码处理的一部分。 特别地，这些技术包括根据SAO过程确定SAO偏移值。 所述技术还包括存储定义用于编码SAO偏移值的不同变化的多个代码的码本。 这些技术还包括根据码本编码SAO偏移值，以便将SAO偏移值指定为由码本定义的多个代码之一。