公开(公告)号：US11772228B2

公开(公告)日：2023-10-03

申请号：US16746292

申请日：2020-01-17

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Ting-Hsun Chang ,  Hung Yen ,  Chi-Hsiang Shen ,  Fu-Ming Huang ,  Chun-Chieh Lin ,  Tsung Hsien Chang ,  Ji Cui ,  Liang-Guang Chen ,  Chih Hung Chen ,  Kei-Wei Chen

IPC: B24B37/16 ,  B24B57/02 ,  B24B37/015 ,  H01L21/306

CPC classification number: B24B37/16 ,  B24B37/015 ,  B24B57/02 ,  H01L21/30625

Abstract: A chemical mechanical planarization apparatus includes a multi-zone platen comprising a plurality of individually controlled concentric toroids. The rotation direction, rotation speed, applied force, relative height, and temperature of each concentric toroid is individually controlled. Concentric polishing pads are affixed to an upper surface of each of the individually controlled concentric toroids. The chemical mechanical planarization apparatus includes a single central slurry source or includes individual slurry sources for each individually controlled concentric toroid.

公开(公告)号：US11685013B2

公开(公告)日：2023-06-27

申请号：US16025913

申请日：2018-07-02

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chih Hung Chen ,  Kei-Wei Chen ,  Ying-Lang Wang

IPC: B24B37/26 ,  B24B37/16 ,  B24B37/24 ,  B24B37/04

CPC classification number: B24B37/24 ,  B24B37/042 ,  B24B37/044 ,  B24B37/16 ,  B24B37/26

Abstract: A polishing pad includes a pad layer and one or more polishing structures over an upper surface of the pad layer, where each of the one or more polishing structures has a pre-determined shape and is formed at a pre-determined location of the pad layer, where the one or more polishing structures comprise at least one continuous line shaped segment extending along the upper surface of the pad layer, where each of the one or more polishing structures is a homogeneous material.

公开(公告)号：US11664213B2

公开(公告)日：2023-05-30

申请号：US16727533

申请日：2019-12-26

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Hui-Chi Huang ,  Jeng-Chi Lin ,  Pin-Chuan Su ,  Chien-Ming Wang ,  Kei-Wei Chen

IPC: B08B7/04 ,  H01L21/02 ,  B08B1/00 ,  B08B3/08 ,  B08B5/04 ,  A46B13/04 ,  B08B1/04

CPC classification number: H01L21/02087 ,  A46B13/04 ,  B08B1/002 ,  B08B1/04 ,  B08B3/08 ,  B08B5/04 ,  B08B7/04 ,  A46B2200/30

Abstract: A tool and methods of removing films from bevel regions of wafers are disclosed. The bevel film removal tool includes an inner motor nested within an outer motor and a bevel brush secured to the outer motor. The bevel brush is adjustable radially outward to allow the wafer to be inserted in the bevel brush and to be secured to the inner motor. The bevel brush is adjustable radially inward to engage one or more sections of the bevel brush and to bring the bevel brush in contact with a bevel region of the wafer. Once engaged, a solution may be dispensed at the engaged sections of the bevel brush and the inner motor and the outer motor may be rotated such that the bevel brush is rotated against the wafer such that the bevel films of the wafer are both chemically and mechanically removed.

公开(公告)号：US20220216202A1

公开(公告)日：2022-07-07

申请号：US17701712

申请日：2022-03-23

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Hsiung Tsai ,  Ziwei Fang ,  Tsan-Chun Wang ,  Kei-Wei Chen

IPC: H01L27/088 ,  H01L21/306 ,  H01L21/311 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66

Abstract: A fin-type field effect transistor comprising a substrate, at least one gate stack and epitaxy material portions is described. The substrate has fins and insulators located between the fins, and the fins include channel portions and flank portions beside the channel portions. The at least one gate stack is disposed over the insulators and over the channel portions of the fins. The epitaxy material portions are disposed over the flank portions of the fins and at two opposite sides of the at least one gate stack. The epitaxy material portions disposed on the flank portions of the fins are separate from one another.

公开(公告)号：US11217479B2

公开(公告)日：2022-01-04

申请号：US16246125

申请日：2019-01-11

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Hsin-Ying Ho ,  Fang-I Chih ,  Hui-Chi Huang ,  Kei-Wei Chen

IPC: H01L21/768

Abstract: A multiple metallization scheme in conductive features of a device uses ion implantation in a first metal layer to make a portion of the first metal layer soluble to a wet cleaning agent. The soluble portion may then be removed by a wet cleaning process and a subsequent second metal layer deposited over the first metal layer. An additional layer may be formed by a second ion implantation in the second metal layer may be used to make a controllable portion of the second metal layer soluble to a wet cleaning agent. The soluble portion of the second metal layer may be removed by a wet cleaning process. The process of depositing metal layers, implanting ions, and removing soluble portions, may be repeated until a desired number of metal layers are provided.

公开(公告)号：US11171209B2

公开(公告)日：2021-11-09

申请号：US16548430

申请日：2019-08-22

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Heng-Wen Ting ,  Kei-Wei Chen ,  Chii-Horng Li ,  Pei-Ren Jeng ,  Hsueh-Chang Sung ,  Yen-Ru Lee ,  Chun-An Lin

IPC: H01L29/08 ,  H01L29/66 ,  H01L21/02 ,  H01L29/78

Abstract: A semiconductor device having an improved source/drain region profile and a method for forming the same are disclosed. In an embodiment, a method includes etching one or more semiconductor fins to form one or more recesses; and forming a source/drain region in the one ore more recesses, the forming the source/drain region including epitaxially growing a first semiconductor material in the one or more recesses at a temperature of 600° C. to 800° C., the first semiconductor material including doped silicon germanium; and conformally depositing a second semiconductor material over the first semiconductor material at a temperature of 300° C. to 600° C., the second semiconductor material including doped silicon germanium and having a different composition than the first semiconductor material.

公开(公告)号：US11139432B1

公开(公告)日：2021-10-05

申请号：US16837641

申请日：2020-04-01

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chang-Miao Liu ,  Bwo-Ning Chen ,  Kei-Wei Chen

IPC: H01L45/00

Abstract: A method of forming a semiconductor device includes patterning a mask layer and a semiconductor material to form a first fin and a second fin with a trench interposing the first fin and the second fin. A first liner layer is formed over the first fin, the second fin, and the trench. An insulation material is formed over the first liner layer. A first anneal is performed, followed by a first planarization of the insulation material to form a first planarized insulation material. After which, a top surface of the first planarized insulation material is over a top surface of the mask layer. A second anneal is performed, followed by a second planarization of the first planarized insulation material to form a second planarized insulation material. The insulation material is etched to form shallow trench isolation (STI) regions, and a gate structure is formed over the semiconductor material.

公开(公告)号：US11133247B2

公开(公告)日：2021-09-28

申请号：US16525186

申请日：2019-07-29

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chia-Wei Ho ,  Chun-Wei Hsu ,  Chi-Hsiang Shen ,  Chi-Jen Liu ,  Yi-Sheng Lin ,  Yang-Chun Cheng ,  William Weilun Hong ,  Liang-Guang Chen ,  Kei-Wei Chen

IPC: H01L23/522 ,  H01L23/528 ,  H01L21/768 ,  H01L21/02 ,  H01L23/532 ,  H01L21/311 ,  H01L21/027 ,  H01L21/3213 ,  H01L21/321 ,  H01L23/00

Abstract: A semiconductor device includes a first dielectric layer over a substrate, the first dielectric layer including a first dielectric material extending from a first side of the first dielectric layer distal from the substrate to a second side of the first dielectric layer opposing the first side; a second dielectric layer over the first dielectric layer; a conductive line in the first dielectric layer, the conductive line including a first conductive material, an upper surface of the conductive line being closer to the substrate than an upper surface of the first dielectric layer; a metal cap in the first dielectric layer, the metal cap being over and physically connected to the conductive line, the metal cap including a second conductive material different from the first conductive material; and a via in the second dielectric layer and physically connected to the metal cap, the via including the second conductive material.

公开(公告)号：US11117239B2

公开(公告)日：2021-09-14

申请号：US16025263

申请日：2018-07-02

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Shich-Chang Suen ,  Kei-Wei Chen ,  Liang-Guang Chen

IPC: B24B37/04 ,  H01L21/306 ,  C09G1/02 ,  C09K3/14

Abstract: An abrasive slurry composition for chemical mechanical planarization/polishing (CMP) is provided. The abrasive slurry includes colloidal alumina, a dispersant, and a pH buffer. The colloidal alumina has a particle size of between about 5 nm and about 100 nm. The colloidal alumina may be alpha phase material having a first hardness of about 9 Mohs, or gamma phase material having a second hardness of about 8 Mohs. The abrasive slurry may further include polyacrylic acid (PAA), a down-force enhancer, or a polish-rate inhibitor.

公开(公告)号：US20210220964A1

公开(公告)日：2021-07-22

申请号：US16746292

申请日：2020-01-17

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Ting-Hsun Chang ,  Hung Yen ,  Chi-Hsiang Shen ,  Fu-Ming Huang ,  Chun-Chieh Lin ,  Tsung Hsien Chang ,  Ji Cui ,  Liang-Guang Chen ,  Chih Hung Chen ,  Kei-Wei Chen

IPC: B24B37/16 ,  H01L21/306 ,  B24B37/015 ,  B24B57/02

Abstract: A chemical mechanical planarization apparatus includes a multi-zone platen comprising a plurality of individually controlled concentric toroids. The rotation direction, rotation speed, applied force, relative height, and temperature of each concentric toroid is individually controlled. Concentric polishing pads are affixed to an upper surface of each of the individually controlled concentric toroids. The chemical mechanical planarization apparatus includes a single central slurry source or includes individual slurry sources for each individually controlled concentric toroid.