公开(公告)号：US11164944B2

公开(公告)日：2021-11-02

申请号：US16543029

申请日：2019-08-16

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Heng-Wen Ting ,  Hsueh-Chang Sung

IPC分类号： H01L29/08 ,  H01L29/66 ,  H01L29/78 ,  H01L21/02

摘要： A semiconductor device having an improved source/drain region profile and a method for forming the same are disclosed. In an embodiment, a method includes etching a semiconductor fin to form a first recess; and forming a source/drain region in the first recess, forming the source/drain region including epitaxially growing a first semiconductor material in the first recess, the first semiconductor material being silicon; epitaxially growing a second semiconductor material over the first semiconductor material, the second semiconductor material including silicon germanium; and epitaxially growing a third semiconductor material over the second semiconductor material, and the third semiconductor material having a germanium concentration from 60 to 80 atomic percent, the third semiconductor material having a germanium concentration greater than the germanium concentration of the second semiconductor material.

公开(公告)号：US20170076973A1

公开(公告)日：2017-03-16

申请号：US15002077

申请日：2016-01-20

申请人： Taiwan Semiconductor Manufacturing Company., Ltd.

发明人： Yen-Ru Lee ,  Chii-Horng Li ,  Chien-I Kuo ,  Lilly Su ,  Chien-Chang Su ,  Heng-Wen Ting ,  Jung-Chi Tai ,  Che-Hui Lee ,  Ying-Wei Li

IPC分类号： H01L21/764 ,  H01L29/08 ,  H01L29/16 ,  H01L29/66 ,  H01L29/161 ,  H01L29/165 ,  H01L29/78 ,  H01L29/06 ,  H01L29/24

CPC分类号： H01L21/764 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/7851

摘要： An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a source/drain region on the first fin and the second fin adjacent the gate structure, and an air gap separating the source/drain region from a top surface of the substrate.

摘要翻译： 一个实施例是一种结构，其包括衬底上的第一鳍片，衬底上的第二鳍片，与第一鳍片相邻的第二鳍片，围绕第一鳍片和第二鳍片的隔离区域，沿着侧壁和上表面的栅极结构 所述第一鳍片和所述第二鳍片的栅极结构限定所述第一鳍片和所述第二鳍片中的沟道区域，所述第一鳍片上的源极/漏极区域和邻近所述栅极结构的所述第二鳍片，以及将所述源极/ 漏极区域。

公开(公告)号：US10468482B2

公开(公告)日：2019-11-05

申请号：US15883179

申请日：2018-01-30

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yen-Ru Lee ,  Chii-Horng Li ,  Chien-I Kuo ,  Heng-Wen Ting ,  Jung-Chi Tai ,  Li-Li Su ,  Tzu-Ching Lin

IPC分类号： H01L29/06 ,  H01L21/283 ,  H01L21/306 ,  H01L21/762 ,  H01L21/764 ,  H01L29/08 ,  H01L29/66 ,  H01L29/78 ,  H01L21/02 ,  H01L21/3065

摘要： A method includes forming a crown structure over a substrate; forming fins in the crown structure; forming an intra-device isolation region between the fins and forming inter-device isolation regions on opposing sides of the crown structure; forming a gate structure over the fins; forming a dielectric layer that extends continuously over the inter-device isolation regions, the fins and the intra-device isolation region; performing an etching process to reduce a thickness of the dielectric layer, where after the etching process, upper surfaces of the inter-device isolation regions and upper surfaces of the fins are exposed while an upper surface of the intra-device isolation region is covered by a remaining portion of the dielectric layer; and forming an epitaxial structure over the exposed upper surfaces of the fins, where after the epitaxial structure is formed, there is a void between the epitaxial structure and the intra-device isolation region.

公开(公告)号：US20190252240A1

公开(公告)日：2019-08-15

申请号：US16390413

申请日：2019-04-22

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yen-Ru Lee ,  Chii-Horng Li ,  Chien-I Kuo ,  Li-Li Su ,  Chien-Chang Su ,  Heng-Wen Ting ,  Jung-Chi Tai ,  Che-Hui Lee ,  Ying-Wei Li

IPC分类号： H01L21/764 ,  H01L29/66 ,  H01L29/78 ,  H01L29/165 ,  H01L29/06 ,  H01L29/24 ,  H01L29/16 ,  H01L29/08 ,  H01L29/161

CPC分类号： H01L21/764 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/7851 ,  H01L29/7853

摘要： An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a source/drain region on the first fin and the second fin adjacent the gate structure, and an air gap separating the source/drain region from a top surface of the substrate.

公开(公告)号：US11107923B2

公开(公告)日：2021-08-31

申请号：US16441337

申请日：2019-06-14

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kun-Mu Li ,  Heng-Wen Ting ,  Yen-Ru Lee ,  Hsueh-Chang Sung

IPC分类号： H01L29/76 ,  H01L29/78 ,  H01L29/08 ,  H01L21/02 ,  H01L29/66

摘要： A method includes forming a semiconductor fin over a substrate, etching the semiconductor fin to form a recess, wherein the recess extends into the substrate, and forming a source/drain region in the recess, wherein forming the source/drain region includes epitaxially growing a first semiconductor material on sidewalls of the recess, wherein the first semiconductor material includes silicon germanium, wherein the first semiconductor material has a first germanium concentration from 10 to 40 atomic percent, epitaxially growing a second semiconductor material over the first semiconductor material, the second semiconductor material including silicon germanium, wherein the second semiconductor material has a second germanium concentration that is greater than the first germanium concentration, and epitaxially growing a third semiconductor material over the second semiconductor material, the third semiconductor material including silicon germanium, wherein the third semiconductor material has a third germanium concentration that is smaller than the second germanium concentration.

公开(公告)号：US11075120B2

公开(公告)日：2021-07-27

申请号：US16542578

申请日：2019-08-16

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kun-Mu Li ,  Heng-Wen Ting ,  Hsueh-Chang Sung ,  Yen-Ru Lee ,  Chien-Wei Lee

IPC分类号： H01L21/82 ,  H01L21/8234 ,  H01L21/308 ,  H01L27/088 ,  H01L29/78 ,  H01L21/3065

摘要： A device includes a fin over a substrate, the fin including a first end and a second end, wherein the first end of the fin has a convex profile, an isolation region adjacent the fin, a gate structure along sidewalls of the fin and over the top surface of the fin, a gate spacer laterally adjacent the gate structure, and an epitaxial region adjacent the first end of the fin.

公开(公告)号：US11004724B2

公开(公告)日：2021-05-11

申请号：US16390413

申请日：2019-04-22

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yen-Ru Lee ,  Chii-Horng Li ,  Chien-I Kuo ,  Li-Li Su ,  Chien-Chang Su ,  Heng-Wen Ting ,  Jung-Chi Tai ,  Che-Hui Lee ,  Ying-Wei Li

IPC分类号： H01L29/66 ,  H01L21/764 ,  H01L29/06 ,  H01L29/08 ,  H01L29/16 ,  H01L29/24 ,  H01L29/161 ,  H01L29/165 ,  H01L29/78

摘要： An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a source/drain region on the first fin and the second fin adjacent the gate structure, and an air gap separating the source/drain region from a top surface of the substrate.

公开(公告)号：US20200176565A1

公开(公告)日：2020-06-04

申请号：US16543029

申请日：2019-08-16

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Heng-Wen Ting ,  Hsueh-Chang Sung

IPC分类号： H01L29/08 ,  H01L21/02 ,  H01L29/78 ,  H01L29/66

摘要： A semiconductor device having an improved source/drain region profile and a method for forming the same are disclosed. In an embodiment, a method includes etching a semiconductor fin to form a first recess; and forming a source/drain region in the first recess, forming the source/drain region including epitaxially growing a first semiconductor material in the first recess, the first semiconductor material being silicon; epitaxially growing a second semiconductor material over the first semiconductor material, the second semiconductor material including silicon germanium; and epitaxially growing a third semiconductor material over the second semiconductor material, and the third semiconductor material having a germanium concentration from 60 to 80 atomic percent, the third semiconductor material having a germanium concentration greater than the germanium concentration of the second semiconductor material.

公开(公告)号：US10991795B2

公开(公告)日：2021-04-27

申请号：US16594851

申请日：2019-10-07

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yen-Ru Lee ,  Chii-Horng Li ,  Chien-I Kuo ,  Heng-Wen Ting ,  Jung-Chi Tai ,  Li-Li Su ,  Tzu-Ching Lin

IPC分类号： H01L29/06 ,  H01L21/02 ,  H01L21/283 ,  H01L21/306 ,  H01L21/762 ,  H01L21/764 ,  H01L29/08 ,  H01L29/66 ,  H01L29/78 ,  H01L21/3065

摘要： A method includes forming a crown structure over a substrate; forming fins in the crown structure; forming an intra-device isolation region between the fins and forming inter-device isolation regions on opposing sides of the crown structure; forming a gate structure over the fins; forming a dielectric layer that extends continuously over the inter-device isolation regions, the fins and the intra-device isolation region; performing an etching process to reduce a thickness of the dielectric layer, where after the etching process, upper surfaces of the inter-device isolation regions and upper surfaces of the fins are exposed while an upper surface of the intra-device isolation region is covered by a remaining portion of the dielectric layer; and forming an epitaxial structure over the exposed upper surfaces of the fins, where after the epitaxial structure is formed, there is a void between the epitaxial structure and the intra-device isolation region.

公开(公告)号：US10944005B2

公开(公告)日：2021-03-09

申请号：US16570144

申请日：2019-09-13

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chih-Yun Chin ,  Chii-Horng Li ,  Chien-Wei Lee ,  Hsueh-Chang Sung ,  Heng-Wen Ting ,  Roger Tai ,  Pei-Ren Jeng ,  Tzu-Hsiang Hsu ,  Yen-Ru Lee ,  Yan-Ting Lin ,  Davie Liu

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L29/165 ,  H01L29/08 ,  H01L21/762 ,  H01L21/8234

摘要： An embodiment is a semiconductor structure. The semiconductor structure includes a substrate. A fin is on the substrate. The fin includes silicon germanium. An interfacial layer is over the fin. The interfacial layer has a thickness in a range from greater than 0 nm to about 4 nm. A source/drain region is over the interfacial layer. The source/drain region includes silicon germanium.