公开(公告)号：US12211843B2

公开(公告)日：2025-01-28

申请号：US17701712

申请日：2022-03-23

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Hsiung Tsai ,  Ziwei Fang ,  Tsan-Chun Wang ,  Kei-Wei Chen

IPC: H01L29/06 ,  H01L21/306 ,  H01L21/311 ,  H01L21/762 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/08 ,  H01L29/66 ,  H01L29/78

Abstract: A fin-type field effect transistor comprising a substrate, at least one gate stack and epitaxy material portions is described. The substrate has fins and insulators located between the fins, and the fins include channel portions and flank portions beside the channel portions. The at least one gate stack is disposed over the insulators and over the channel portions of the fins. The epitaxy material portions are disposed over the flank portions of the fins and at two opposite sides of the at least one gate stack. The epitaxy material portions disposed on the flank portions of the fins are separate from one another.

公开(公告)号：US10734411B2

公开(公告)日：2020-08-04

申请号：US16051280

申请日：2018-07-31

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yi-Tang Lin ,  Chun-Hsiung Tsai ,  Clement Hsingjen Wann

IPC: H01L27/12 ,  H01L27/092 ,  H01L21/8238 ,  H01L21/762 ,  H01L29/10 ,  H01L21/84 ,  H01L29/165

Abstract: A method of fabricating a semiconductor structure having multiple semiconductor device layers is provided. The method comprises providing a bulk substrate and growing a first channel material on the bulk substrate wherein the lattice constant of the first channel material is different from the lattice constant of the bulk substrate to introduce strain to the first channel material. The method further comprises fabricating a first semiconductor device layer on the bulk substrate with the strained first channel material, fabricating a buffer layer comprising dielectric material with a blanket top surface above the first semiconductor layer, bonding to the blanket top surface a bottom surface of a second substrate comprising a buried oxide with a second channel material above the buried oxide, and fabricating a second semiconductor device layer on the second substrate.

公开(公告)号：US10535768B2

公开(公告)日：2020-01-14

申请号：US15985495

申请日：2018-05-21

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Hsiung Tsai ,  Kuo-Feng Yu ,  Kei-Wei Chen

IPC: H01L27/088 ,  H01L29/78 ,  H01L29/66 ,  H01L21/223 ,  H01L21/324 ,  H01L21/225 ,  H01L21/8238 ,  H01L27/092 ,  H01L21/3115

Abstract: A semiconductor structure includes a substrate, a first semiconductor fin, a second semiconductor fin, and a first lightly-doped drain (LDD) region. The first semiconductor fin is disposed on the substrate. The first semiconductor fin has a top surface and sidewalls. The second semiconductor fin is disposed on the substrate. The first semiconductor fin and the second semiconductor fin are separated from each other at a nanoscale distance. The first lightly-doped drain (LDD) region is disposed at least in the top surface and the sidewalls of the first semiconductor fin.

公开(公告)号：US20190006483A1

公开(公告)日：2019-01-03

申请号：US16051002

申请日：2018-07-31

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Hsiung Tsai ,  Kuo-Feng Yu ,  Chien-Tai Chan ,  Ziwei Fang ,  Kei-Wei Chen ,  Huai-Tei Yang

IPC: H01L29/49 ,  H01L29/66 ,  H01L21/225 ,  H01L29/78

CPC classification number: H01L29/4966 ,  H01L21/2254 ,  H01L29/66492 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/785

Abstract: A gate structure, a semiconductor device, and the method of forming a semiconductor device are provided. In various embodiments, the gate structure includes a gate stack and a doped spacer overlying a sidewall of the gate stack. The gate stack contains a doped work function metal (WFM) stack and a metal gate electrode overlying the doped WFM stack.

公开(公告)号：US20200152792A1

公开(公告)日：2020-05-14

申请号：US16741364

申请日：2020-01-13

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Hsiung Tsai ,  Kuo-Feng Yu ,  Kei-Wei Chen

IPC: H01L29/78 ,  H01L27/092 ,  H01L21/8238 ,  H01L21/225 ,  H01L21/324 ,  H01L21/223 ,  H01L29/66 ,  H01L21/3115

Abstract: A semiconductor structure includes a substrate, a first semiconductor fin, a second semiconductor fin, and a first lightly-doped drain (LDD) region. The first semiconductor fin is disposed on the substrate. The first semiconductor fin has a top surface and sidewalls. The second semiconductor fin is disposed on the substrate. The first semiconductor fin and the second semiconductor fin are separated from each other at a nanoscale distance. The first lightly-doped drain (LDD) region is disposed at least in the top surface and the sidewalls of the first semiconductor fin.

公开(公告)号：US11355635B2

公开(公告)日：2022-06-07

申请号：US16741364

申请日：2020-01-13

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Hsiung Tsai ,  Kuo-Feng Yu ,  Kei-Wei Chen

IPC: H01L27/088 ,  H01L29/78 ,  H01L29/66 ,  H01L21/223 ,  H01L21/324 ,  H01L21/225 ,  H01L21/8238 ,  H01L27/092 ,  H01L21/3115

Abstract: A semiconductor structure includes a substrate, a first semiconductor fin, a second semiconductor fin, and a first lightly-doped drain (LDD) region. The first semiconductor fin is disposed on the substrate. The first semiconductor fin has a top surface and sidewalls. The second semiconductor fin is disposed on the substrate. The first semiconductor fin and the second semiconductor fin are separated from each other at a nanoscale distance. The first lightly-doped drain (LDD) region is disposed at least in the top surface and the sidewalls of the first semiconductor fin.

公开(公告)号：US10749008B2

公开(公告)日：2020-08-18

申请号：US16051002

申请日：2018-07-31

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Hsiung Tsai ,  Kuo-Feng Yu ,  Chien-Tai Chan ,  Ziwei Fang ,  Kei-Wei Chen ,  Huai-Tei Yang

IPC: H01L29/66 ,  H01L29/49 ,  H01L29/78 ,  H01L21/225

Abstract: A gate structure, a semiconductor device, and the method of forming a semiconductor device are provided. In various embodiments, the gate structure includes a gate stack and a doped spacer overlying a sidewall of the gate stack. The gate stack contains a doped work function metal (WFM) stack and a metal gate electrode overlying the doped WFM stack.

公开(公告)号：US20180337198A1

公开(公告)日：2018-11-22

申请号：US16051280

申请日：2018-07-31

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yi-Tang Lin ,  Chun-Hsiung Tsai ,  Clement Hsingjen Wann

IPC: H01L27/12 ,  H01L27/092 ,  H01L29/10 ,  H01L21/762 ,  H01L21/84 ,  H01L21/8238 ,  H01L29/165

CPC classification number: H01L27/1207 ,  H01L21/76254 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/092 ,  H01L27/1211 ,  H01L29/1054 ,  H01L29/165

Abstract: A method of fabricating a semiconductor structure having multiple semiconductor device layers is provided. The method comprises providing a bulk substrate and growing a first channel material on the bulk substrate wherein the lattice constant of the first channel material is different from the lattice constant of the bulk substrate to introduce strain to the first channel material. The method further comprises fabricating a first semiconductor device layer on the bulk substrate with the strained first channel material, fabricating a buffer layer comprising dielectric material with a blanket top surface above the first semiconductor layer, bonding to the blanket top surface a bottom surface of a second substrate comprising a buried oxide with a second channel material above the buried oxide, and fabricating a second semiconductor device layer on the second substrate.

公开(公告)号：US20220216202A1

公开(公告)日：2022-07-07

申请号：US17701712

申请日：2022-03-23

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Hsiung Tsai ,  Ziwei Fang ,  Tsan-Chun Wang ,  Kei-Wei Chen

IPC: H01L27/088 ,  H01L21/306 ,  H01L21/311 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66

Abstract: A fin-type field effect transistor comprising a substrate, at least one gate stack and epitaxy material portions is described. The substrate has fins and insulators located between the fins, and the fins include channel portions and flank portions beside the channel portions. The at least one gate stack is disposed over the insulators and over the channel portions of the fins. The epitaxy material portions are disposed over the flank portions of the fins and at two opposite sides of the at least one gate stack. The epitaxy material portions disposed on the flank portions of the fins are separate from one another.

公开(公告)号：US11201205B2

公开(公告)日：2021-12-14

申请号：US16738095

申请日：2020-01-09

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Hsiung Tsai ,  Shahaji B. More ,  Yu-Ming Lin ,  Clement Hsingjen Wann

IPC: H01L23/528 ,  H01L23/522 ,  H01L23/00 ,  H01L27/146 ,  H01L27/108 ,  H01L29/94 ,  H01L49/02

Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device includes a substrate, a deep trench capacitor (DTC) within the substrate, and an interconnect structure over the DTC and the substrate. The interconnect structure includes a seal ring structure in electrical contact with the substrate, a first conductive via in electrical contact with the DTC, and a first conductive line electrically coupling the seal ring structure to the first conductive via.