公开(公告)号：US10215652B2

公开(公告)日：2019-02-26

申请号：US15475924

申请日：2017-03-31

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Alberto Pagani

IPC: G01L9/00 ,  G01L27/00

Abstract: A microelectromechanical sensing structure having a membrane region including a membrane that undergoes deformation as a function of a pressure and a first actuator that is controlled in a first operating mode and a second operating mode, the first actuator being such that, when it operates in the second operating mode, it contacts the membrane region and deforms the membrane in a way different from when it operates in the first operating mode.

公开(公告)号：US20190049330A1

公开(公告)日：2019-02-14

申请号：US16157450

申请日：2018-10-11

Applicant: STMicroelectronics S.r.l.

Inventor： Alberto Pagani

IPC: G01L25/00 ,  G01L1/26 ,  G01L1/16 ,  G01L1/22

Abstract: A pressure sensor includes a support body that includes a recess; a substrate coupled to the support body; a dielectric layer coupled between the support body and the substrate; and a pressure sensor circuit of the piezoresistive type or piezoelectric type. The pressure sensor circuit is coupled to the substrate and disposed over the recess. The pressure sensor circuit is configured to bend into the recess when the pressure sensor circuit is subjected to external pressure.

公开(公告)号：US10180456B2

公开(公告)日：2019-01-15

申请号：US15367271

申请日：2016-12-02

Applicant: STMicroelectronics S.r.l.

Inventor： Alberto Pagani

IPC: G01R31/28 ,  H01L21/66 ,  H01L23/58 ,  H01L23/00

Abstract: A testing architecture for integrated circuits on a wafer includes at least one first circuit of a structure TEG realized in a scribe line providing separation between first and second integrated circuits. At least one pad is shared by a second circuit inside at least one of the first and second integrated circuits and the first circuit. Switching circuitry is coupled to the at least one pad and to the first and second circuits.

公开(公告)号：US10060972B2

公开(公告)日：2018-08-28

申请号：US15290386

申请日：2016-10-11

Applicant: STMicroelectronics S.r.l.

Inventor： Alberto Pagani

IPC: G01R31/28 ,  G01R1/04 ,  B62M25/04 ,  G01R1/067 ,  G01R1/073

CPC classification number: G01R31/2889 ,  B62M25/04 ,  G01R1/0491 ,  G01R1/06727 ,  G01R1/07342

Abstract: A probe card is adapted for testing at least one integrated circuit that integrated on a corresponding at least one die of a semiconductor material wafer. The probe card includes a board adapted for the coupling to a tester apparatus. Several probes are coupled to the board. The probe card includes replaceable elementary units, wherein each unit includes at least one probe for contacting externally-accessible terminals of an integrated circuit under test. The replaceable elementary units are arranged so as to correspond to an arrangement of at least one die on the semiconductor material wafer containing integrated circuits to be tested.

公开(公告)号：US20180195916A1

公开(公告)日：2018-07-12

申请号：US15914832

申请日：2018-03-07

Applicant: STMicroelectronics S.r.l.

Inventor： Alberto Pagani ,  Federico Giovanni Ziglioli ,  Bruno Murari

IPC: G01L5/00 ,  F16B31/02 ,  G01L1/18 ,  G01L1/20

CPC classification number: G01L5/0038 ,  F16B31/028 ,  G01L1/18 ,  G01L1/20

Abstract: A pressure sensing device may include a body configured to distribute a load applied between first and second parts positioned one against the other, and a pressure sensor carried by the body. The pressure sensor may include a support body, and an IC die mounted with the support body and defining a cavity. The IC die may include pressure sensing circuitry responsive to bending associated with the cavity, and an IC interface coupled to the pressure sensing circuitry.

公开(公告)号：US20180106854A1

公开(公告)日：2018-04-19

申请号：US15841585

申请日：2017-12-14

Applicant: STMicroelectronics S.r.l.

Inventor： Alberto Pagani

IPC: G01R31/27 ,  H01L21/66 ,  H01L23/48 ,  H01L21/768 ,  G01R31/28

CPC classification number: G01R31/275 ,  G01R31/2853 ,  H01L21/76898 ,  H01L22/34 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A testing system for carrying out electrical testing of at least one first through via forms an insulated via structure extending only part way through a substrate of a first body of semiconductor material. The testing system has a first electrical test circuit integrated in the first body and electrically coupled to the insulated via structure. The first electrical test circuit enables detection of at least one electrical parameter of the insulated via structure.

公开(公告)号：US20180067163A1

公开(公告)日：2018-03-08

申请号：US15813000

申请日：2017-11-14

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Alberto Pagani

IPC: G01R31/3177 ,  G01R31/317 ,  G01R31/3185

CPC classification number: G01R31/3177 ,  G01R31/31713 ,  G01R31/318536 ,  G01R31/318563

Abstract: An electronic device having a functional portion and a test portion. The test portion includes a boundary scan register formed by a plurality of test cells arranged in the body according to a register sequence, where first test cells are configured to form a serial-to-parallel converter and second test cells are configured to form a parallel-to-serial converter. The test cells are each coupled to a respective data access pin of the device and to a respective input/output point of the functional part and have a first test input and a test output. The boundary scan register defines two test half-paths formed, respectively, by the first test cells and by the second test cells. The first test cells are directly coupled according to a first sub-sequence, and the second test cells are directly coupled according to a second sub-sequence.

公开(公告)号：US09881911B2

公开(公告)日：2018-01-30

申请号：US13801354

申请日：2013-03-13

Applicant: STMicroelectronics S.r.l.

Inventor： Alberto Pagani

IPC: H01L23/48 ,  H01L21/60 ,  H05K7/20 ,  H05K1/00 ,  H01L25/11 ,  H01L27/02 ,  H01L21/768 ,  H01L25/065 ,  H01L23/31 ,  H01L23/66 ,  H01L23/00 ,  H01L21/683 ,  H01L25/10 ,  H05K1/18 ,  H01L21/66 ,  H01L21/56 ,  H01L23/498

CPC classification number: H01L27/0203 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/768 ,  H01L22/22 ,  H01L23/3128 ,  H01L23/48 ,  H01L23/49833 ,  H01L23/66 ,  H01L24/02 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/09 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/94 ,  H01L24/95 ,  H01L25/0657 ,  H01L25/105 ,  H01L2221/68304 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2223/6677 ,  H01L2224/0231 ,  H01L2224/02313 ,  H01L2224/02319 ,  H01L2224/02321 ,  H01L2224/02371 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05569 ,  H01L2224/06187 ,  H01L2224/08137 ,  H01L2224/08146 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/14183 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2105 ,  H01L2224/211 ,  H01L2224/28105 ,  H01L2224/29024 ,  H01L2224/30183 ,  H01L2224/32145 ,  H01L2224/32227 ,  H01L2224/45015 ,  H01L2224/45099 ,  H01L2224/48 ,  H01L2224/48091 ,  H01L2224/48175 ,  H01L2224/73207 ,  H01L2224/73215 ,  H01L2224/73251 ,  H01L2224/82106 ,  H01L2224/94 ,  H01L2224/95 ,  H01L2225/06531 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/06572 ,  H01L2225/06596 ,  H01L2225/1023 ,  H01L2225/1064 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15159 ,  H01L2924/207 ,  H05K1/181 ,  H05K1/189 ,  H05K2201/10515 ,  Y02P70/611 ,  H01L2224/02 ,  H01L2224/08 ,  H01L2224/16 ,  H01L2224/32 ,  H01L2224/19 ,  H01L2924/00

Abstract: An embodiment of an electronic system may be provided so as to have superior coupling by implementing a communication mechanism that provides at least for horizontal communication for example, on the basis of wired and/or wireless communication channels, in the system. Hence, by enhancing vertical and horizontal communication capabilities in the electronic system, a reduced overall size may be achieved, while nevertheless reducing complexity in PCBs coupled to the electronic system. In this manner, overall manufacturing costs and reliability of complex electronic systems may be enhanced.

公开(公告)号：US09874598B2

公开(公告)日：2018-01-23

申请号：US14827796

申请日：2015-08-17

Applicant: STMicroelectronics S.r.l.

Inventor： Alberto Pagani

IPC: G01R31/26 ,  H01L21/66 ,  H01L21/768 ,  G01R31/27 ,  H01L23/48 ,  G01R31/28

CPC classification number: G01R31/275 ,  G01R31/2853 ,  H01L21/76898 ,  H01L22/34 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A testing system for carrying out electrical testing of at least one first through via forms an insulated via structure extending only part way through a substrate of a first body of semiconductor material. The testing system has a first electrical test circuit integrated in the first body and electrically coupled to the insulated via structure. The first electrical test circuit enables detection of at least one electrical parameter of the insulated via structure.

公开(公告)号：US09823300B2

公开(公告)日：2017-11-21

申请号：US14868904

申请日：2015-09-29

Applicant: STMicroelectronics S.r.l.

Inventor： Alberto Pagani

IPC: G01R31/20 ,  G01R31/28

CPC classification number: G01R31/2884 ,  G01R31/2889 ,  G01R31/2891

Abstract: An electrical check executed on wafer tests for the correct positioning or alignment of the probes of a probe card on the pads or bumps of the electronic devices integrated on the wafer. A signal is applied to cause a current to circulate in at least part of a seal ring of at least one of the electronic devices. In a case where the current flows between and through multiple electronic devices, the seal rings of those electronic devices are suitably interconnected to each other by electronic structures that extend through the scribe line between electronic devices.