公开(公告)号：US20230290697A1

公开(公告)日：2023-09-14

申请号：US18160498

申请日：2023-01-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yonghwan KWON

IPC: H01L21/66 ,  H01L23/538 ,  H01L23/00 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L22/32 ,  H01L21/565 ,  H01L21/568 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/6835 ,  H01L22/12 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L2221/68372 ,  H01L2224/214

Abstract: A semiconductor package includes a semiconductor chip having first and second contact pads that are alternately arranged in a first direction; an insulating film having first openings respectively defining first pad regions of first contact pads, and second openings respectively defining second pad regions of the second contact pads; first and second conductive capping layers on the first and second pad regions, respectively; and an insulating layer on the insulating film, and having first and second contact holes respectively connected to the first and second conductive capping layers. Each of the first and second pad regions includes a bonding region having a first width and a probing region having a second width, greater than the first width, and each of the second pad regions is arranged in a direction that is opposite to each of the plurality of first pad regions.

公开(公告)号：US20140217580A1

公开(公告)日：2014-08-07

申请号：US14170809

申请日：2014-02-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Yun MYUNG ,  Yonghwan KWON

IPC: H01L23/00

CPC classification number: H01L24/13 ,  H01L21/563 ,  H01L23/3128 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05166 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11472 ,  H01L2224/11825 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/11906 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13022 ,  H01L2224/13076 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/13564 ,  H01L2224/13655 ,  H01L2224/1601 ,  H01L2224/16058 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/73204 ,  H01L2224/81011 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/81907 ,  H01L2924/15311 ,  H01L2924/3841 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A semiconductor device includes a bonding pad on a semiconductor substrate, a bump on the bonding pad, a solder on the bump, and an anti-wetting layer between the bump and the solder extending along a sidewall of the bump, the anti-wetting layer having a first thickness T1 along the sidewall of the bump closer to the solder and a second thickness T2 along the sidewall of the bump closer to the bonding pad, wherein T2

Abstract translation: 一种半导体器件包括：半导体衬底上的焊盘，焊盘上的凸块，凸块上的焊料，以及沿着凸块的侧壁延伸的凸块和焊料之间的防潮湿层，防湿层 沿凸块的靠近焊料的侧壁具有第一厚度T1，沿凸点的侧壁更靠近焊盘的第二厚度T2，其中T2

公开(公告)号：US20210208837A1

公开(公告)日：2021-07-08

申请号：US17140311

申请日：2021-01-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyeonji LEE ,  Yonghwan KWON ,  Soyoung SHIN ,  Jisoo YOON ,  Hajeong YUN ,  Sangjoon LEE ,  Eunjin LEE

IPC: G06F3/16 ,  H04N21/41 ,  H04R3/12

Abstract: Provided is a display apparatus including: a display; a content interface; a communication interface; and a controller configured to: control the display to display an image corresponding to the broadcast signal received through the content interface; receive operation information of an external audio apparatus through at least one interface selected from the content interface and the communication interface; and control the display to display a control menu for providing the operation information of the external audio apparatus and acquiring a user input related to an operation of the external audio apparatus in response to the operation information of the external audio apparatus being received.

公开(公告)号：US20240105541A1

公开(公告)日：2024-03-28

申请号：US18311597

申请日：2023-05-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yonghwan KWON

IPC: H01L23/367 ,  H01L23/373 ,  H01L23/48 ,  H01L23/498 ,  H01L23/538 ,  H01L25/00 ,  H01L25/10

CPC classification number: H01L23/367 ,  H01L23/3736 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/5383 ,  H01L25/105 ,  H01L25/50 ,  H01L24/08 ,  H01L2224/08225

Abstract: A semiconductor package includes a first redistribution wiring layer including a first redistribution wiring layer having a plurality of first redistribution wires, and a plurality of first bonding pads electrically connected to the first redistribution wires and exposed from a lower surface, a first semiconductor substrate on an upper surface of the plurality of first redistribution wiring layer, the first semiconductor substrate having at least one first semiconductor chip and through vias that are electrically connected to the first redistribution wires, and the first semiconductor substrate having a first heat dissipation structure that surrounds an outer surface of the first semiconductor chip, a second redistribution wiring layer on the first semiconductor substrate, and the second redistribution having a plurality of second redistribution wires that are electrically connected to the through vias, and a second semiconductor substrate having at least one second semiconductor chip that is electrically connected to the plurality of second redistribution wires, and a second heat dissipation structure surrounding an outer surface of the second semiconductor chip.

公开(公告)号：US20140051243A1

公开(公告)日：2014-02-20

申请号：US14064467

申请日：2013-10-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Han-shin YOUN ,  Yonghwan KWON ,  YoungHoon RO ,  Woojae KIM ,  Sungwoo PARK

IPC: H01L23/00

CPC classification number: H01L24/03 ,  H01L21/563 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/16 ,  H01L24/48 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/50 ,  H01L2224/73204 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2225/1082 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An example embodiment relates to a semiconductor package. The semiconductor package includes a first substrate including a first pad, a second substrate upwardly spaced apart from the first substrate and including a second pad opposite to the first pad. At least one electrode is coupled between the first pad and the second pad. The semiconductor package includes a guide ring formed at a periphery of the electrode between the first substrate and the second substrate.

Abstract translation: 示例性实施例涉及半导体封装。 半导体封装包括第一衬底，其包括第一焊盘，与第一衬底向上间隔开的第二衬底，并且包括与第一焊盘相对的第二焊盘。 至少一个电极耦合在第一焊盘和第二焊盘之间。 半导体封装包括形成在第一基板和第二基板之间的电极的周边处的引导环。

公开(公告)号：US20230005806A1

公开(公告)日：2023-01-05

申请号：US17677459

申请日：2022-02-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yonghwan KWON

IPC: H01L23/31 ,  H01L23/538 ,  H01L23/00 ,  H01L25/065

Abstract: A semiconductor package may include a redistribution substrate including first and second surfaces opposite each other, a first semiconductor chip on the first surface, a first molding portion on a side surface of the first semiconductor chip, a second semiconductor chip between the first semiconductor chip and the redistribution substrate, a second molding portion between the redistribution substrate and the first molding portion and on a side surface of the second semiconductor chip, bump patterns between the second semiconductor chip and the redistribution substrate, and a mold via penetrating the second molding portion and electrically connecting the first semiconductor chip to the redistribution substrate. The redistribution substrate may include first and second redistribution patterns sequentially in an insulating layer. The mold via may contact the second redistribution pattern, and the bump patterns may contact the first redistribution pattern.

公开(公告)号：US20220068730A1

公开(公告)日：2022-03-03

申请号：US17196538

申请日：2021-03-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joonsung KIM ,  Yonghwan KWON ,  Sanguk KIM

IPC: H01L21/66 ,  H01L23/00 ,  H01L23/31

Abstract: A semiconductor package is provided. The semiconductor package includes a chip pad of a semiconductor chip, the chip pad including a connection portion and a test portion in a first surface of the chip pad; a barrier layer covering the chip pad, the barrier layer defining a first opening and a second opening that is separate from the first opening, the first opening exposing the connection portion of the chip pad, and the second opening exposing the test portion of the chip pad; and a redistribution structure.