Abstract:
A method of fabricating a semiconductor device is provided. The method includes forming a first fin structure which includes first semiconductor patterns and second semiconductor patterns stacked alternately on a substrate and extends in a first direction, forming an exposed first wire pattern group which includes the second semiconductor patterns by removing the first semiconductor patterns, heat-treating the exposed first wire pattern group, and forming a first gate electrode which surrounds the first wire pattern group and extends in a second direction different from the first direction.
Abstract:
The present invention discloses a video decoding method performed by a video decoding device. The video decoding method according to an embodiment may include the steps of: obtaining NAL unit type information indicating a type of a current network abstraction layer (NAL) unit from a bitstream; and decoding, when the NAL unit type information indicates that the NAL unit type of the current NAL unit is an encoded data for an slice, the slice based on whether a mixed NAL unit type is applied to a current picture.
Abstract:
A semiconductor device includes a cell substrate including a cell array region and an extension region surrounding the cell array region, a mold structure including gate electrodes sequentially stacked on the cell substrate, channel structures disposed on the cell array region and intersecting the gate electrodes, a bit-line connected to at least some of the channel structures, a block isolation region cutting the mold structure, a source layer disposed between the cell substrate and the mold structure and connected to a side surface of each of the channel structures, and a support layer disposed between the source layer and the mold structure on upper surfaces of the cell substrate and the source layer. The support layer includes a support structure contacting the upper surface of the cell substrate. The support structure includes a peripheral portion surrounding the cell array region, and a mesh portion disposed on the extension region.
Abstract:
A semiconductor memory device may include a substrate including a first and a second block region, and a stacked structure including insulating films and gate electrodes alternately stacked on the substrate. A vertical channel structure, a word line cut structure, and a block cut structure may penetrate the stacked structure. The word line cut structure may extend in a second direction. The block cut structure may extend in a first direction, connect to the word line cut structure, and define the first and second block regions. The block cut structure may include a first portion connected to the word line cut structure and a second portion connected to the first portion. From a planar viewpoint, the first portion may include at least a part not overlapping the second portion in the first direction and at least a region not overlapping the word line cut structure in the first direction.
Abstract:
A semiconductor device is provided. The semiconductor device includes a substrate, an active pattern extending in a first horizontal direction on the substrate, a plurality of nanosheets stacked to be spaced apart from each other in a vertical direction on the active pattern, a gate electrode extending in a second horizontal direction different from the first horizontal direction on the active pattern, the gate electrode surrounding the plurality of nanosheets, a source/drain region disposed on at least one side of the gate electrode on the active pattern, a first inner spacer disposed between the source/drain region and the gate electrode between the plurality of nanosheets, the first inner spacer being in contact with the source/drain region, and a second inner spacer disposed between the first inner spacer and the gate electrode between the plurality of nanosheets, the second inner spacer including a material different from a material of the first inner spacer, each of an upper surface and a lower surface of the second inner spacer being in contact with the first inner spacer.
Abstract:
Provided are a video decoding method and device. This specification provides a video decoding method comprising the steps of: acquiring a parameter indicating whether a multiple transform set is applicable to a block to be decoded, as well as information about the width of the block to be decoded and the height of the block to be decoded; determining the transform type of the block to be decoded on the basis of at least one of the parameter indicating whether a multiple transform set is applicable, or the information about the width and height of the block to be decoded, and setting a zero-out region of the block to be decoded; and inverse-transforming the block to be decoded on the basis of the zero-out region of the block to be decoded and the result of determining the transform type.
Abstract:
Provided are a video decoding method and device. This specification provides a video decoding method comprising the steps of: acquiring a parameter indicating whether a multiple transform set is applicable to a block to be decoded, as well as information about the width of the block to be decoded and the height of the block to be decoded; determining the transform type of the block to be decoded on the basis of at least one of the parameter indicating whether a multiple transform set is applicable, or the information about the width and height of the block to be decoded, and setting a zero-out region of the block to be decoded; and inverse-transforming the block to be decoded on the basis of the zero-out region of the block to be decoded and the result of determining the transform type.
Abstract:
A method for manufacturing a semiconductor device includes forming a trench defining a plurality of active fins in a substrate, forming a sacrificial layer on the plurality of active fins, forming a sacrificial oxide layer, and removing the sacrificial oxide layer. The forming the sacrificial oxide layer includes heat-treating the sacrificial layer and surfaces of the plurality of active fins.
Abstract:
A docking station for sound amplification and sound quality enhancement is provided. The docking station includes a support structure for holding a mobile terminal having an internal speaker to sustain the posture of the mobile terminal, and a body for supporting the support structure, and for physically contacting the speaker to increase the volume of sound output from the speaker. The body includes a collecting hole for contacting the speaker to collect sound waves, and a guide hole that extends from the collecting hole through the body to the outside along an extension direction, is divided into two branches within the body to guide the collected sound waves along different paths, and has a horn shape whose cross section increases along the extension direction. Hence, the docking station can increase the volume of audible sound and sound quality without separate supply of power.