公开(公告)号：US10573729B2

公开(公告)日：2020-02-25

申请号：US16417973

申请日：2019-05-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Edward Namkyu Cho ,  Bo-ra Lim ,  Geum-jung Seong ,  Seung-hun Lee

IPC: H01L29/66 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/308 ,  H01L29/78 ,  H01L21/02 ,  H01L29/08 ,  H01L27/092 ,  H01L27/11 ,  H01L27/10 ,  H01L29/165

Abstract: An integrated circuit device includes: a first fin active region extending in a first direction parallel to a top surface of a substrate; a second fin active region extending in the first direction and spaced apart from the first fin active region in a second direction different from the first direction; a gate line intersecting the first and second fin active regions; a first source/drain region on one side of the gate line in the first fin active region; and a second source/drain region on one side of the gate line in the second fin active region and facing the first source/drain region, wherein a cross-section of the first source/drain region perpendicular to the first direction has an asymmetric shape with respect to a center line of the first source/drain region in the second direction extending in a third direction perpendicular to the top surface of the substrate.

公开(公告)号：US11862679B2

公开(公告)日：2024-01-02

申请号：US17686700

申请日：2022-03-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min-Hee Choi ,  Seokhoon Kim ,  Choeun Lee ,  Edward Namkyu Cho ,  Seung Hun Lee

IPC: H01L27/092 ,  H01L29/78 ,  H01L21/8238 ,  H10B12/00 ,  H01L29/08 ,  H01L29/417 ,  H10B10/00

CPC classification number: H01L29/0847 ,  H01L21/823814 ,  H01L21/823821 ,  H01L27/0924 ,  H01L29/41791 ,  H01L29/785 ,  H10B10/12 ,  H10B12/36

Abstract: A semiconductor device including a substrate including an active pattern; a gate electrode crossing the active pattern; a source/drain pattern adjacent to one side of the gate electrode and on an upper portion of the active pattern; an active contact electrically connected to the source/drain pattern; and a silicide layer between the source/drain pattern and the active contact, the source/drain pattern including a body part including a plurality of semiconductor patterns; and a capping pattern on the body part, the body part has a first facet, a second facet on the first facet, and a corner edge defined where the first facet meets the second facet, the corner edge extending parallel to the substrate, the capping pattern covers the second facet of the body part and exposes the corner edge, and the silicide layer covers a top surface of the body part and a top surface of the capping pattern.

公开(公告)号：US11735631B2

公开(公告)日：2023-08-22

申请号：US17470288

申请日：2021-09-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Cho-eun Lee ,  Seok-hoon Kim ,  Sang-gil Lee ,  Edward Namkyu Cho ,  Min-hee Choi ,  Seung-hun Lee

IPC: H01L29/08 ,  H01L29/78 ,  H01L21/8238 ,  H01L21/8234

CPC classification number: H01L29/0847 ,  H01L21/823418 ,  H01L21/823425 ,  H01L21/823814 ,  H01L29/785

Abstract: A semiconductor device includes: a fin-type active region extending on a substrate in a first direction that is parallel to an upper surface of the substrate; and a source/drain region in a recess region extending into the fin-type active region, wherein the source/drain region includes: a first source/drain material layer; a second source/drain material layer on the first source/drain material layer; and a first dopant diffusion barrier layer on an interface between the first source/drain material layer and the second source/drain material layer.

公开(公告)号：US11217667B2

公开(公告)日：2022-01-04

申请号：US16806629

申请日：2020-03-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seokhoon Kim ,  Dongmyoung Kim ,  Kanghun Moon ,  Hyunkwan Yu ,  Sanggil Lee ,  Seunghun Lee ,  Sihyung Lee ,  Choeun Lee ,  Edward Namkyu Cho ,  Yang Xu

IPC: H01L29/08 ,  H01L29/78 ,  H01L27/088 ,  H01L29/06

Abstract: A semiconductor device includes a substrate, a fin structure on the substrate, a gate structure on the fin structure, a gate spacer on at least on side surface of the gate structure, and a source/drain structure on the fin structure, wherein a topmost portion of a bottom surface of the gate spacer is lower than a topmost portion of a top surface of the fin structure, and a topmost portion of a top surface of the source/drain structure is lower than the topmost portion of the top surface of the fin structure.

公开(公告)号：US11145720B2

公开(公告)日：2021-10-12

申请号：US16453347

申请日：2019-06-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Cho-eun Lee ,  Seok-hoon Kim ,  Sang-gil Lee ,  Edward Namkyu Cho ,  Min-hee Choi ,  Seung-hun Lee

IPC: H01L29/08 ,  H01L29/78 ,  H01L21/8238 ,  H01L21/8234

Abstract: A semiconductor device includes: a fin-type active region extending on a substrate in a first direction that is parallel to an upper surface of the substrate; and a source/drain region in a recess region extending into the fin-type active region, wherein the source/drain region includes: a first source/drain material layer; a second source/drain material layer on the first source/drain material layer; and a first dopant diffusion barrier layer on an interface between the first source/drain material layer and the second source/drain material layer.

公开(公告)号：US11735632B2

公开(公告)日：2023-08-22

申请号：US17546690

申请日：2021-12-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seokhoon Kim ,  Dongmyoung Kim ,  Kanghun Moon ,  Hyunkwan Yu ,  Sanggil Lee ,  Seunghun Lee ,  Sihyung Lee ,  Choeun Lee ,  Edward Namkyu Cho ,  Yang Xu

IPC: H01L29/08 ,  H01L29/78 ,  H01L27/088 ,  H01L29/06

CPC classification number: H01L29/0847 ,  H01L27/0886 ,  H01L29/0653 ,  H01L29/0673 ,  H01L29/785 ,  H01L29/7853

Abstract: A semiconductor device includes a substrate, a fin structure on the substrate, a gate structure on the fin structure, a gate spacer on at least on side surface of the gate structure, and a source/drain structure on the fin structure, wherein a topmost portion of a bottom surface of the gate spacer is lower than a topmost portion of a top surface of the fin structure, and a topmost portion of a top surface of the source/drain structure is lower than the topmost portion of the top surface of the fin structure.

公开(公告)号：US11302779B2

公开(公告)日：2022-04-12

申请号：US16452668

申请日：2019-06-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min-Hee Choi ,  Seokhoon Kim ,  Choeun Lee ,  Edward Namkyu Cho ,  Seung Hun Lee

IPC: H01L27/092 ,  H01L29/78 ,  H01L21/8238 ,  H01L27/108 ,  H01L29/08 ,  H01L27/11 ,  H01L29/417

Abstract: A semiconductor device including a substrate including an active pattern; a gate electrode crossing the active pattern; a source/drain pattern adjacent to one side of the gate electrode and on an upper portion of the active pattern; an active contact electrically connected to the source/drain pattern; and a silicide layer between the source/drain pattern and the active contact, the source/drain pattern including a body part including a plurality of semiconductor patterns; and a capping pattern on the body part, the body part has a first facet, a second facet on the first facet, and a corner edge defined where the first facet meets the second facet, the corner edge extending parallel to the substrate, the capping pattern covers the second facet of the body part and exposes the corner edge, and the silicide layer covers a top surface of the body part and a top surface of the capping pattern.

公开(公告)号：US10672764B2

公开(公告)日：2020-06-02

申请号：US16174894

申请日：2018-10-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seok-hoon Kim ,  Dong-myoung Kim ,  Jin-bum Kim ,  Seung-hun Lee ,  Cho-eun Lee ,  Hyun-jung Lee ,  Sung-uk Jang ,  Edward Namkyu Cho ,  Min-hee Choi

IPC: H01L27/085 ,  H01L29/06 ,  H01L29/423 ,  H01L27/088 ,  H01L21/8234

Abstract: A semiconductor device includes a first region having a first active pattern with first protrusion portions and first recess portions, and a second region having a second active pattern with second protrusion portions and second recess portions. First gate patterns are on the first protrusion portions. Second gate patterns are on the second protrusion portions. A first source/drain region is on one of the first recess portion of the first active pattern between two of the first gate patterns. The first source/drain region has a first reinforcing epitaxial layer at an upper portion thereof. A second source/drain region is on one of the second recess portions of the second active pattern between two of the second gate patterns. The second source/drain region has a second reinforcing epitaxial layer having an epitaxial growth surface that is shaped differently than a first epitaxial growth surface of the first reinforcing epitaxial layer.

公开(公告)号：US20190252376A1

公开(公告)日：2019-08-15

申请号：US16174894

申请日：2018-10-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seok-hoon Kim ,  Dong-myoung Kim ,  Jin-bum Kim ,  Seung-hun Lee ,  Cho-eun Lee ,  Hyun-jung Lee ,  Sung-uk Jang ,  Edward Namkyu Cho ,  Min-hee Choi

IPC: H01L27/085 ,  H01L29/423 ,  H01L29/06

Abstract: A semiconductor device includes a first region having a first active pattern with first protrusion portions and first recess portions, and a second region having a second active pattern with second protrusion portions and second recess portions. First gate patterns are on the first protrusion portions. Second gate patterns are on the second protrusion portions. A first source/drain region is on one of the first recess portion of the first active pattern between two of the first gate patterns. The first source/drain region has a first reinforcing epitaxial layer at an upper portion thereof. A second source/drain region is on one of the second recess portions of the second active pattern between two of the second gate patterns. The second source/drain region has a second reinforcing epitaxial layer having an epitaxial growth surface that is shaped differently than a first epitaxial growth surface of the first reinforcing epitaxial layer.

公开(公告)号：US10319841B2

公开(公告)日：2019-06-11

申请号：US15870549

申请日：2018-01-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Edward Namkyu Cho ,  Bo-ra Lim ,  Geum-jung Seong ,  Seung-hun Lee

IPC: H01L29/66 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/308 ,  H01L21/02 ,  H01L29/78 ,  H01L29/08

Abstract: An integrated circuit device includes: a first fin active region extending in a first direction parallel to a top surface of a substrate; a second fin active region extending in the first direction and spaced apart from the first fin active region in a second direction different from the first direction; a gate line intersecting the first and second fin active regions; a first source/drain region on one side of the gate line in the first fin active region; and a second source/drain region on one side of the gate line in the second fin active region and facing the first source/drain region, wherein a cross-section of the first source/drain region perpendicular to the first direction has an asymmetric shape with respect to a center line of the first source/drain region in the second direction extending in a third direction perpendicular to the top surface of the substrate.