公开(公告)号：US20240387429A1

公开(公告)日：2024-11-21

申请号：US18318691

申请日：2023-05-16

Applicant: QUALCOMM Incorporated

Inventor： Yujen Chen ,  Yangyang Sun ,  Wei Wang

IPC: H01L23/00

Abstract: Underfill and bump interconnects in a circuit package expand at different rates during a thermal reflow process, causing stress at one end of a bump interconnect that couples to a metal pad. A bump interconnect having multiple isolated areas of contact between a conductive pillar and the metal pad, rather than a single larger continuous contact area, distributes the concentration of stresses to reduce the peak stress, which reduces the chances of damage due to stress occurring between the metal pad and the conductive pillar or in a dielectric layer adjacent to the metal pad. In some examples, before formation of the conductive pillar, a passivation layer is disposed in a pattern on the metal pad with openings in which a plurality of surfaces of the second end of the conductive pillar contact the metal pad.

公开(公告)号：US12113038B2

公开(公告)日：2024-10-08

申请号：US17027316

申请日：2020-09-21

Applicant: QUALCOMM Incorporated

Inventor： Dongming He ,  Hung-Yuan Hsu ,  Yangyang Sun ,  Wei Hu ,  Wei Wang ,  Lily Zhao

IPC: H01L23/00

CPC classification number: H01L24/13 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/13027 ,  H01L2924/35

Abstract: A thermal compression flip chip (TCFC) bump may be used for high performance products that benefit from a fine pitch. In one example, a new TCFC bump structure adds a metal pad underneath the TCFC copper pillar bump to cover the exposed aluminum bump pad. This new structure prevents the pad from corroding and reduces mechanical stress to the pad and underlying silicon dielectric layers enabling better quality and reliability and further bump size reduction. For example, a flip chip connection may include a substrate; a metal pad on a contact side of the substrate and a first passivation layer on the contact side of the substrate to protect the metal pad from corrosion.

公开(公告)号：US20140256276A1

公开(公告)日：2014-09-11

申请号：US13784821

申请日：2013-03-05

Applicant: QUALCOMM INCORPORATED

Inventor： Miao Li ,  Xiaohua Kong ,  Jingcheng Zhuang ,  Wei Wang

IPC: H04B1/18

CPC classification number: H04B3/50 ,  H04B3/30

Abstract: Techniques for accommodating an incoming signal at a front-end receiver via AC-coupling or DC-coupling are described herein. In one aspect, a front-end receiver comprises a differential input with a first data line and a second data line for receiving an incoming signal. The front-end receiver also comprises an AC-coupled switch coupled to the differential input, wherein the AC-coupled switch is configured to both perform high-pass filtering on the incoming signal and offset the filtered incoming signal with a DC-offset voltage if an AC-coupling mode of the receiver is enabled. The front-end receiver further comprises a DC-coupled switch coupled to the differential input, wherein the DC-coupled switch is configured to shift a common-mode voltage of the incoming signal if a DC-coupling mode of the receiver is enabled.

Abstract translation: 这里描述了用于通过AC耦合或DC耦合在前端接收器处容纳输入信号的技术。 一方面，前端接收机包括具有第一数据线的差分输入和用于接收输入信号的第二数据线。 前端接收器还包括耦合到差分输入的AC耦合开关，其中AC耦合开关被配置为对输入信号执行高通滤波，并且通过DC偏移电压偏移滤波的输入信号，如果 接收器的AC耦合模式被使能。 前端接收器还包括耦合到差分输入的DC耦合开关，其中如果接收器的DC耦合模式被使能，则DC耦合开关被配置为移位输入信号的共模电压。

公开(公告)号：US20240243056A1

公开(公告)日：2024-07-18

申请号：US18155398

申请日：2023-01-17

Applicant: QUALCOMM Incorporated

Inventor： Yangyang Sun ,  Manuel Aldrete ,  Wei Wang

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/538 ,  H01L25/10

CPC classification number: H01L23/49894 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5385 ,  H01L23/5386 ,  H01L25/105 ,  H01L24/16 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2225/1088 ,  H01L2225/1094

Abstract: Integrated circuit (IC) packages employing a re-distribution layer (RDL) substrate(s) with photosensitive non-polymer dielectric material layers for increased package rigidity, and related fabrication methods. To reduce or minimize warpage of an IC package employing a RDL substrate, the RDLs of the RDL substrate are photosensitive non-polymer dielectric material layers. The photosensitive non-polymer dielectric material layers can exhibit increased rigidity as a result of being hardened when exposed to light and cured during fabrication of the RDL substrate. The photosensitive non-polymer dielectric material layers can also exhibit increased rigidity as a result of being an inorganic polymer (e.g., SiOx, SiN material) that has a higher material modulus for increased stiffness and/or a lower coefficient of thermal expansion (CTE) for reduced thermal contraction and expansion, as opposed to for example, an organic polymer material (e.g., Polyimide) which has less stiffness and a higher CTE.

公开(公告)号：US20180331061A1

公开(公告)日：2018-11-15

申请号：US15843865

申请日：2017-12-15

Applicant: QUALCOMM Incorporated

Inventor： Dongming He ,  Lily Zhao ,  Wei Wang ,  Ahmer Syed

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/29 ,  H01L21/56

CPC classification number: H01L24/13 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/56 ,  H01L23/291 ,  H01L23/293 ,  H01L23/3128 ,  H01L23/3171 ,  H01L23/3192 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/10 ,  H01L24/11 ,  H01L24/94 ,  H01L2224/0218 ,  H01L2224/0219 ,  H01L2224/0221 ,  H01L2224/02215 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02331 ,  H01L2224/02372 ,  H01L2224/02375 ,  H01L2224/024 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/03462 ,  H01L2224/03466 ,  H01L2224/0347 ,  H01L2224/0361 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05548 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05583 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/13007 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13565 ,  H01L2224/1357 ,  H01L2224/13655 ,  H01L2224/16238 ,  H01L2924/3512 ,  H01L2924/35121 ,  H01L2924/0544 ,  H01L2924/00012 ,  H01L2924/07025 ,  H01L2924/01028 ,  H01L2924/05042 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A device comprising a semiconductor die and a redistribution portion coupled to the semiconductor die. The redistribution portion includes a passivation layer and a redistribution interconnect comprising a first surface and a second surface opposite to the first surface. The redistribution interconnect is formed over the passivation layer such that the first surface is over the passivation layer and the second surface is free of contact with any passivation layer. The device includes a bump interconnect coupled to the second surface of the redistribution interconnect. In some implementations, the bump interconnect comprises a surface that faces the redistribution interconnect, and wherein an entire surface of the bump interconnect that faces the redistribution interconnect is free of contact with the passivation layer.

公开(公告)号：US09584184B2

公开(公告)日：2017-02-28

申请号：US13784821

申请日：2013-03-05

Applicant: QUALCOMM Incorporated

Inventor： Miao Li ,  Xiaohua Kong ,  Jingcheng Zhuang ,  Wei Wang

IPC: H04B1/06 ,  H04B7/00 ,  H04B3/50 ,  H04B3/30

CPC classification number: H04B3/50 ,  H04B3/30

Abstract: Techniques for accommodating an incoming signal at a front-end receiver via AC-coupling or DC-coupling are described herein. In one aspect, a front-end receiver comprises a differential input with a first data line and a second data line for receiving an incoming signal. The front-end receiver also comprises an AC-coupled switch coupled to the differential input, wherein the AC-coupled switch is configured to both perform high-pass filtering on the incoming signal and offset the filtered incoming signal with a DC-offset voltage if an AC-coupling mode of the receiver is enabled. The front-end receiver further comprises a DC-coupled switch coupled to the differential input, wherein the DC-coupled switch is configured to shift a common-mode voltage of the incoming signal if a DC-coupling mode of the receiver is enabled.

Abstract translation: 这里描述了用于通过AC耦合或DC耦合在前端接收器处容纳输入信号的技术。 一方面，前端接收机包括具有第一数据线的差分输入和用于接收输入信号的第二数据线。 前端接收器还包括耦合到差分输入的AC耦合开关，其中AC耦合开关被配置为对输入信号执行高通滤波，并且通过DC偏移电压偏移滤波的输入信号，如果 接收器的AC耦合模式被使能。 前端接收器还包括耦合到差分输入的DC耦合开关，其中如果接收器的DC耦合模式被使能，则DC耦合开关被配置为移位输入信号的共模电压。