公开(公告)号：US20250118645A1

公开(公告)日：2025-04-10

申请号：US18987457

申请日：2024-12-19

Applicant: QUALCOMM Incorporated

Inventor： Jihong Choi ,  Giridhar Nallapati ,  William Stone ,  Jianwen Xu ,  Jonghae Kim ,  Periannan Chidambaram ,  Ahmer Syed

IPC: H01L23/498 ,  H01L21/48 ,  H10D1/68

Abstract: Integrated circuit (IC) packages employing a capacitor-embedded, redistribution layer (RDL) substrate and related fabrication methods. The embedded capacitor can be coupled to a power distribution network (PDN) to provide decoupling capacitance to reduce current-resistance (IR) drop. The RDL substrate is disposed between the IC chip(s) and the package substrate to minimize distance between the embedded capacitor(s) and the IC chip(s) to reduce the parasitic inductance in the PDN, thus reducing PDN noise. With the RDL substrate disposed between the package substrate and the IC chip(s), the RDL substrate needs to support through-interconnections between the package substrate and the IC chip(s). In this regard, the RDL substrate includes an outer RDL layer adjacent to the IC chip(s) to support small pitch metal interconnects as well as provide fan-out capability. This provides enhanced connectivity compatibility with higher-density die interconnect IC chips while also supporting a closer located embedded capacitor in the PDN.

公开(公告)号：US20180331061A1

公开(公告)日：2018-11-15

申请号：US15843865

申请日：2017-12-15

Applicant: QUALCOMM Incorporated

Inventor： Dongming He ,  Lily Zhao ,  Wei Wang ,  Ahmer Syed

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/29 ,  H01L21/56

CPC classification number: H01L24/13 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/56 ,  H01L23/291 ,  H01L23/293 ,  H01L23/3128 ,  H01L23/3171 ,  H01L23/3192 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/10 ,  H01L24/11 ,  H01L24/94 ,  H01L2224/0218 ,  H01L2224/0219 ,  H01L2224/0221 ,  H01L2224/02215 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02331 ,  H01L2224/02372 ,  H01L2224/02375 ,  H01L2224/024 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/03462 ,  H01L2224/03466 ,  H01L2224/0347 ,  H01L2224/0361 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05548 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05583 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/13007 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13565 ,  H01L2224/1357 ,  H01L2224/13655 ,  H01L2224/16238 ,  H01L2924/3512 ,  H01L2924/35121 ,  H01L2924/0544 ,  H01L2924/00012 ,  H01L2924/07025 ,  H01L2924/01028 ,  H01L2924/05042 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A device comprising a semiconductor die and a redistribution portion coupled to the semiconductor die. The redistribution portion includes a passivation layer and a redistribution interconnect comprising a first surface and a second surface opposite to the first surface. The redistribution interconnect is formed over the passivation layer such that the first surface is over the passivation layer and the second surface is free of contact with any passivation layer. The device includes a bump interconnect coupled to the second surface of the redistribution interconnect. In some implementations, the bump interconnect comprises a surface that faces the redistribution interconnect, and wherein an entire surface of the bump interconnect that faces the redistribution interconnect is free of contact with the passivation layer.

公开(公告)号：US12218041B2

公开(公告)日：2025-02-04

申请号：US17237828

申请日：2021-04-22

Applicant: QUALCOMM Incorporated

Inventor： Jihong Choi ,  Giridhar Nallapati ,  William Stone ,  Jianwen Xu ,  Jonghae Kim ,  Periannan Chidambaram ,  Ahmer Syed

IPC: H01L23/498 ,  H01L21/48 ,  H01L49/02

Abstract: Integrated circuit (IC) packages employing a capacitor-embedded, redistribution layer (RDL) substrate and related fabrication methods. The embedded capacitor can be coupled to a power distribution network (PDN) to provide decoupling capacitance to reduce current-resistance (IR) drop. The RDL substrate is disposed between the IC chip(s) and the package substrate to minimize distance between the embedded capacitor(s) and the IC chip(s) to reduce the parasitic inductance in the PDN, thus reducing PDN noise. With the RDL substrate disposed between the package substrate and the IC chip(s), the RDL substrate needs to support through-interconnections between the package substrate and the IC chip(s). In this regard, the RDL substrate includes an outer RDL layer adjacent to the IC chip(s) to support small pitch metal interconnects as well as provide fan-out capability. This provides enhanced connectivity compatibility with higher-density die interconnect IC chips while also supporting a closer located embedded capacitor in the PDN.

公开(公告)号：US20220344250A1

公开(公告)日：2022-10-27

申请号：US17237828

申请日：2021-04-22

Applicant: QUALCOMM Incorporated

Inventor： Jihong Choi ,  Giridhar Nallapati ,  William Stone ,  Jianwen Xu ,  Jonghae Kim ,  Periannan Chidambaram ,  Ahmer Syed

IPC: H01L23/498 ,  H01L49/02 ,  H01L21/48

Abstract: Integrated circuit (IC) packages employing a capacitor-embedded, redistribution layer (RDL) substrate and related fabrication methods. The embedded capacitor can be coupled to a power distribution network (PDN) to provide decoupling capacitance to reduce current-resistance (IR) drop. The RDL substrate is disposed between the IC chip(s) and the package substrate to minimize distance between the embedded capacitor(s) and the IC chip(s) to reduce the parasitic inductance in the PDN, thus reducing PDN noise. With the RDL substrate disposed between the package substrate and the IC chip(s), the RDL substrate needs to support through-interconnections between the package substrate and the IC chip(s). In this regard, the RDL substrate includes an outer RDL layer adjacent to the IC chip(s) to support small pitch metal interconnects as well as provide fan-out capability. This provides enhanced connectivity compatibility with higher-density die interconnect IC chips while also supporting a closer located embedded capacitor in the PDN.