公开(公告)号：US20230054026A1

公开(公告)日：2023-02-23

申请号：US17891832

申请日：2022-08-19

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Hyun Wook JUNG ,  Seong II KIM ,  Hae Cheon KIM ,  Youn Sub NOH ,  Ho Kyun AHN ,  Sang Heung LEE ,  Jong Won LIM ,  Sung Jae CHANG ,  II Gyu CHOI

IPC: H01L29/778 ,  H01L29/66 ,  H01L29/423 ,  H01L29/40

Abstract: Provided are a nitride-based high electron mobility transistor having enhanced frequency characteristics and an improved structural stability and manufacturing method thereof. The nitride-based high electron mobility transistor includes a first semiconductor layer and a second semiconductor layer sequentially formed on a substrate, source drain electrodes formed on the second semiconductor layer, a first insulating film formed on the second semiconductor layer and having an opening, a dielectric formed on the first insulating film to surround the opening of the first insulating film, a second insulating film formed on an inner sidewall of the dielectric, and a gate electrode formed on the dielectric to fill the opening of the first insulating film and inside the inner sidewall of the dielectric. A width of the inner sidewall at a bottom end of the dielectric is smaller than a width of the inner sidewall at a top end of the dielectric.

公开(公告)号：US20220285244A1

公开(公告)日：2022-09-08

申请号：US17562587

申请日：2021-12-27

Applicant: Electronics and Telecommunications Research Institute

Inventor： Il Gyu CHOI ,  Seong Il KIM ,  Hae Cheon KIM ,  Youn Sub NOH ,  Ho Kyun AHN ,  Sang Heung LEE ,  Jong Won LIM ,  Sung Jae CHANG ,  Hyun Wook JUNG

IPC: H01L23/373

Abstract: The present invention improves a heat dissipation property of a semiconductor device by transferring hexagonal boron nitride (hBN) with a two-dimensional nanostructure to the semiconductor device. A semiconductor device of the present invention includes a substrate having a first surface and a second surface, a semiconductor layer formed on the first surface of the substrate, an hBN layer formed on at least one surface of the first surface and the second surface of the substrate, and a heat sink positioned on the second surface of the substrate. A radiation rate of heat generated during driving of an element is increased to decrease a reduction in lifetime of a semiconductor device due to a temperature increase. The semiconductor device has a structure and configuration which are very effective in improving a rapid temperature increase due to heat generated by high-power semiconductor devices.

公开(公告)号：US20170237171A1

公开(公告)日：2017-08-17

申请号：US15229891

申请日：2016-08-05

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Dong-Young KIM ,  Dong Min KANG ,  SEONG-IL KIM ,  Hae Cheon KIM ,  Jae Won DO ,  Byoung-Gue MIN ,  Ho Kyun AHN ,  Hyung Sup YOON ,  Sang-Heung LEE ,  Jong Min LEE ,  Jong-Won LIM ,  Yoo Jin JANG ,  Hyun Wook JUNG ,  Kyu Jun CHO ,  Chull Won JU

IPC: H01Q9/04 ,  H01Q1/50

CPC classification number: H01Q9/0407 ,  H01Q1/50 ,  H01Q9/0442

Abstract: Provided herein is a patch antenna including a multilayered substrate on which a plurality of dielectric layers are laminated; at least one metal pattern layer disposed between the plurality of dielectric layers outside a central area of the multilayered substrate; an antenna patch disposed on an upper surface of the multilayered substrate and within the central area; a ground layer disposed on a lower surface of the multilayered substrate; a plurality of connection via patterns penetrating the plurality of dielectric layers to connect the metal pattern layer and the ground layer, and surrounding the central area; a transmission line comprising a first transmission line unit disposed on the upper surface of the multilayered substrate and located outside the central area, and a second transmission line unit disposed on the upper surface of the multilayered substrate and located within the central area; and an impedance transformer located below the second transmission line unit within the central area of the multilayered substrate.

公开(公告)号：US20170236909A1

公开(公告)日：2017-08-17

申请号：US15248676

申请日：2016-08-26

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Ho Kyun AHN ,  Dong Min KANG ,  Yong-Hwan KWON ,  Dong-Young KIM ,  SEONG IL KIM ,  Hae Cheon KIM ,  Eun Soo NAM ,  Jae Won DO ,  Byoung-Gue MIN ,  Hyung Sup YOON ,  Sang-Heung LEE ,  Jong Min LEE ,  Jong-Won LIM ,  Hyun Wook JUNG ,  Kyu Jun CHO

IPC: H01L29/40 ,  H01L29/66 ,  H01L29/778 ,  H01L29/20 ,  H01L29/205

CPC classification number: H01L29/404 ,  H01L21/6835 ,  H01L29/0619 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/401 ,  H01L29/4175 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/7787 ,  H01L2221/68327 ,  H01L2221/6834

Abstract: A high electron mobility transistor includes a substrate including a first surface and a second surface facing each other and having a via hole passing through the first surface and the second surface, an active layer on the first surface, a cap layer on the active layer and including a gate recess region exposing a portion of the active layer, a source electrode and a drain electrode on one of the cap layer and the active layer, an insulating layer on the source electrode and the drain electrode and having on opening corresponding to the gate recess region to expose the gate recess region, a first field electrode on the insulating layer, a gate electrode electrically connected to the first field electrode on the insulating layer, and a second field electrode on the second surface and contacting the active layer through the via hole.

公开(公告)号：US20170133471A1

公开(公告)日：2017-05-11

申请号：US15238492

申请日：2016-08-16

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Jong Min LEE ,  Byoung-Gue MIN ,  Hyung Sup YOON ,  Dong Min KANG ,  Dong-Young KIM ,  SEONG-IL KIM ,  Hae Cheon KIM ,  Jae Won DO ,  Ho Kyun AHN ,  Sang-Heung LEE ,  Jong-Won LIM ,  Hyun Wook JUNG ,  Kyu Jun CHO ,  Chull Won JU

IPC: H01L29/40 ,  H01L29/66 ,  H01L29/778 ,  H01L29/20 ,  H01L29/205

CPC classification number: H01L29/408 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/7787

Abstract: The present invention relates to a high reliability field effect power device and a manufacturing method thereof. A method of manufacturing a field effect power device includes sequentially forming a transfer layer, a buffer layer, a barrier layer and a passivation layer on a substrate, patterning the passivation layer by etching a first region of the passivation layer, and forming at least one electrode on the first region of the barrier layer exposed by patterning the passivation layer, wherein the first region is provided to form the at least one electrode, and the passivation layer may include a material having a wider bandgap than the barrier layer to prevent a trapping effect and a leakage current of the field effect power device.