公开(公告)号：US12129572B2

公开(公告)日：2024-10-29

申请号：US16309535

申请日：2017-01-24

申请人： SUMITOMO CHEMICAL COMPANY, LIMITED

发明人： Hajime Fujikura ,  Taichiro Konno

IPC分类号： H01L33/12 ,  C23C16/34 ,  C30B25/18 ,  C30B28/12 ,  C30B29/40 ,  H01L21/02 ,  H01L33/00 ,  H01L33/32

CPC分类号： C30B29/406 ,  C23C16/34 ,  C30B25/183 ,  C30B28/12 ,  H01L21/0242 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02609 ,  H01L21/0262 ,  H01L33/007 ,  H01L33/12 ,  H01L33/32

摘要： There is provided a nitride semiconductor template, including: a substrate having a front surface and a back surface opposite to the front surface; a back side semiconductor layer provided on a back surface side of the substrate, comprising a polycrystalline group III nitride semiconductor, and having a linear expansion coefficient different from a linear expansion coefficient of the substrate; and a front side semiconductor layer provided on a front surface side of the substrate, comprising a monocrystalline group III nitride semiconductor, and having a linear expansion coefficient different from a linear expansion coefficient of the substrate, wherein a thickness of the front side semiconductor layer is a thickness exceeding a critical thickness at which cracks are generated in the front side semiconductor layer when only the front side semiconductor layer is formed without forming the back side semiconductor layer.

公开(公告)号：US12107129B2

公开(公告)日：2024-10-01

申请号：US18302378

申请日：2023-04-18

申请人： Mitsubishi Chemical Corporation

发明人： Satoru Nagao ,  Yusuke Tsukada ,  Kazunori Kamada ,  Shuichi Kubo ,  Hirotaka Ikeda ,  Kenji Fujito ,  Hideo Fujisawa ,  Yutaka Mikawa ,  Tae Mochizuki

IPC分类号： C30B25/20 ,  C30B7/10 ,  C30B25/18 ,  C30B29/40 ,  H01L21/02 ,  H01L29/20 ,  C30B23/02

CPC分类号： H01L29/2003 ,  C30B7/105 ,  C30B25/186 ,  C30B25/20 ,  C30B29/406 ,  H01L21/02389 ,  H01L21/0254 ,  C30B23/025

摘要： An object is to provide a nonpolar or semipolar GaN substrate having improved size and crystal quality. A self-standing GaN substrate has an angle between the normal of the principal surface and an m-axis of 0 degrees or more and 20 degrees or less, wherein: the size of the projected image in a c-axis direction when the principal surface is vertically projected on an M-plane is 10 mm or more; and when an a-axis length is measured on an intersection line between the principal surface and an A-plane, a low distortion section with a section length of 6 mm or more and with an a-axis length variation within the section of 10.0×10−5 Å or less is observed.

公开(公告)号：US12095002B2

公开(公告)日：2024-09-17

申请号：US17437606

申请日：2020-05-27

申请人： ENKRIS SEMICONDUCTOR, INC.

发明人： Kai Cheng

IPC分类号： H01L33/12 ,  C30B25/04 ,  C30B25/20 ,  C30B29/40 ,  H01L33/00 ,  H01L33/16 ,  H01L33/32

CPC分类号： H01L33/12 ,  C30B25/04 ,  C30B25/20 ,  C30B29/403 ,  H01L33/007 ,  H01L33/16 ,  H01L33/32

摘要： A group-III-nitride structure and a manufacturing method thereof are provided. In the manufacturing method, a first mask layer is first formed on a substrate; an uncoalesced second group-III-nitride epitaxial layer is formed by performing a first epitaxial growth with the first mask layer as a mask; and a second mask layer is formed at least on the second group-III-nitride epitaxial layer; a third group-III-nitride epitaxial layer is laterally grown and formed by performing a second epitaxial growth on the second group-III-nitride epitaxial layer with the second mask layer as a mask, where the second group-III-nitride epitaxial layer is coalesced by the third group-III-nitride epitaxial layer; a fourth group-III-nitride epitaxial layer is formed by performing a third epitaxial growth on the third group-III-nitride epitaxial layer.

公开(公告)号：US12060652B2

公开(公告)日：2024-08-13

申请号：US17310565

申请日：2019-11-27

申请人： SINO NITRIDE SEMICONDUCTOR CO., LTD.

发明人： Ye Huang ,  Peng Liu ,  Jianhui Wang ,  Jingquan Lu

IPC分类号： C30B29/40 ,  C30B25/14

CPC分类号： C30B29/40 ,  C30B25/14

摘要： A linear showerhead for growing GaN, including a first gas base, a second gas base, and a third gas base. First central gas passages are disposed in the middle of the first gas base. A first gap is disposed between two adjacent first central gas passages. A first nozzle is disposed at the bottom of a first central gas passage. The second gas base is disposed on the first gas base. Second central gas passages are disposed in the middle of the second gas base. A second gap is disposed between two adjacent second central gas passages. Two sides of a second central gas passage are provided with a second nozzle. The third gas base includes third central gas passages. A third central gas passage penetrates a first gap and a second gap. A third nozzle is disposed at the bottom of a third central gas passage.

公开(公告)号：US20240263348A1

公开(公告)日：2024-08-08

申请号：US18106732

申请日：2023-02-07

申请人： Robert Bosch GmbH

发明人： Bo CHENG ,  Mordechai KORNBLUTH ,  Charles TUFFILE ,  Jens BARINGHAUS ,  Christian HUBER

IPC分类号： C30B25/16 ,  C30B25/18 ,  C30B29/40 ,  H01L21/02 ,  H01L23/31

CPC分类号： C30B25/16 ,  C30B25/183 ,  C30B29/406 ,  H01L21/022 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L23/3171 ,  H01L23/3192 ,  H01L21/02126 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02175 ,  H01L23/291

摘要： A method of manufacturing a structure for power electronics which includes epitaxially growing a GaN semiconductor layer is provided. The method includes growing buffer layers formed of AlN and AlxGa(1-x)N, wherein 0

公开(公告)号：US20240229291A1

公开(公告)日：2024-07-11

申请号：US18291881

申请日：2021-12-08

申请人： THE 13TH RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION

发明人： Shujie WANG ,  Niefeng SUN ,  Yanlei SHI ,  Huimin SHAO ,  Senfeng XU ,  Lijie FU ,  Yang WANG ,  Xiaolan LI ,  Xin OU ,  Ruiliang SONG ,  Huisheng LIU ,  Tongnian SUN

IPC分类号： C30B15/02 ,  C30B15/00 ,  C30B15/10 ,  C30B15/22 ,  C30B29/40

CPC分类号： C30B15/02 ,  C30B15/002 ,  C30B15/10 ,  C30B15/22 ,  C30B29/40

摘要： A system and method for growing a large-size compound semiconductor single crystal belong to the field of single crystal preparation, in particular to a system and method for preparing a large-size, especially ultra-long compound semiconductor single crystal. The large-size single crystal growth system includes a crystal growth space control device and a raw material injection device within a furnace body. The raw materials are injected in the raw material synthesis and crystal growth processes, and the growth space is adjusted according to the length of the single crystal. Due to the existence of multiple times of necking treatment, it can reduce the thermal stress of the crystal itself, to prevent breakage as the crystal grows too long, while substantially reducing the generation of defects and the extension of the original defects during the multiple growth processes; and such structure can be free from the limitation of the size of high-pressure preparation apparatuses. The raw material loading and injection system can realize cooling of the loading and injection system to enable continuous synthesis or intermittent synthesis.

公开(公告)号：US20240218559A1

公开(公告)日：2024-07-04

申请号：US17924306

申请日：2022-07-20

申请人： Suzhou Everbright Photonics Co., Ltd. ,  Everbright Institute of Semiconductor Photonics Co., Ltd.

发明人： Jun WANG ,  Yang Cheng ,  Xiao Xiao ,  Yintao Guo ,  Yudan Cuo

IPC分类号： C30B25/14 ,  C30B25/10 ,  C30B29/40

CPC分类号： C30B25/14 ,  C30B25/10 ,  C30B29/40

摘要： The present application provides a semiconductor growth device and an operation method thereof. The semiconductor growth device includes: a reaction chamber; a heating base arranged in the reaction chamber, where the heating base includes a first heating area and a second heating area arranged around a periphery of the first heating area, a heating temperature of the first heating area is greater than a heating temperature of the second heating area, and a surface of the second heating area is adapted for placing a substrate; and a first spray unit and a second spray unit arranged at a top of the reaction chamber, where the first spray unit is arranged above the first heating area, and the second spray unit is arranged above the second heating area, where the first spray unit includes at least a first pipe, the first pipe is adapted for introducing a first gas source, the second spray unit includes at least a second pipe, the second pipe is adapted for introducing a second gas source, and a decomposition temperature of the first gas source is greater than a decomposition temperature of the second gas source. The optimal growth temperature range of the semiconductor growth device is reduced, and the use range of the device is expanded.

公开(公告)号：US20240209502A1

公开(公告)日：2024-06-27

申请号：US18425035

申请日：2024-01-29

申请人： Lehigh University

发明人： Siddha PIMPUTKAR

IPC分类号： C23C16/455 ,  C23C16/30 ,  C23C16/458 ,  C30B25/10 ,  C30B25/12 ,  C30B25/14 ,  C30B29/40 ,  H01L21/02 ,  H01L21/687

CPC分类号： C23C16/45514 ,  C23C16/303 ,  C23C16/4584 ,  C30B25/10 ,  C30B25/12 ,  C30B25/14 ,  C30B29/406 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/68764

摘要： High pressure spatial chemical vapor deposition apparatuses and related process are disclosed for forming thin films on a substrate. An enclosure includes plural process chambers fluidly isolated from each other by radial separating barriers. Each chamber contains a different source gas comprising volatile reactive species. The substrate is supported beneath the chambers on a rotating heated susceptor. Rotation of the susceptor carries the substrate in a path which consecutively exposes the substrate to the volatile reactive species in each process chamber. The gases first mix in the gaseous boundary layer formed adjacent the substrate. A thin film gradually grows in thickness on the substrate with each successive pass and exposure to the reactive species in each process chamber. The tool pressure and boundary layer thickness may be dynamically varied during the film formation process run via a programmable controller to alter the film composition and features formed on the substrate.

公开(公告)号：US12020985B2

公开(公告)日：2024-06-25

申请号：US17327816

申请日：2021-05-24

申请人： The Government of the United States of America, as represented by the Secretary of the Navy

发明人： Travis J. Anderson ,  Marko J. Tadjer ,  Karl D. Hobart

IPC分类号： B29C65/00 ,  C30B29/40 ,  H01L21/02 ,  H01L21/48 ,  H01L21/78 ,  H01L23/373 ,  H01L29/20 ,  H01L29/24 ,  H01L29/778 ,  H01L29/872 ,  B29C65/02 ,  B32B43/00

CPC分类号： H01L21/7813 ,  C30B29/406 ,  H01L21/0242 ,  H01L21/0254 ,  H01L21/02568 ,  H01L21/4807 ,  H01L23/3732 ,  H01L29/2003 ,  H01L29/24 ,  H01L29/7786 ,  H01L29/872 ,  B29C65/02 ,  B32B43/006 ,  Y10T156/1168 ,  Y10T156/1911

摘要： Methods for obtaining a free-standing thick (>5 μm) epitaxial material layer or heterostructure stack and for transferring the thick epitaxial layer or stack to an arbitrary substrate. A thick epitaxial layer or heterostructure stack is formed on an engineered substrate, with a sacrificial layer disposed between the epitaxial layer and the engineered substrate. When the sacrificial layer is removed, the epitaxial layer becomes a thick freestanding layer that can be transferred to an arbitrary substrate, with the remaining engineered substrate being reusable for subsequent material layer growth. In an exemplary case, the material layer is a GaN layer and can be selectively bonded to an arbitrary substrate to selectively produce a Ga-polar or an N-polar GaN layer.

公开(公告)号：US20240191396A1

公开(公告)日：2024-06-13

申请号：US18285099

申请日：2022-03-31

申请人： University of Copenhagen ,  Danmarks Tekniske Universitet

发明人： Joachim Elbeshausen Sestoft ,  Thomas Kanne Nordqvist ,  Mikelis Marnauza ,  Aske Nørskov Gejl ,  Dags Olsteins ,  Kasper Grove-Rasmussen ,  Jesper Nygård

IPC分类号： C30B29/60 ,  C30B11/12 ,  C30B29/40 ,  C30B29/66 ,  H01L29/06 ,  H01L29/20 ,  H01L29/66 ,  H01L29/76 ,  H01L31/0352 ,  H01L33/06 ,  H10N60/12

CPC分类号： C30B29/605 ,  C30B11/12 ,  C30B29/40 ,  C30B29/66 ,  H01L29/0665 ,  H01L29/20 ,  H01L29/66977 ,  H01L29/7613 ,  H01L31/035227 ,  H01L33/06 ,  H10N60/12

摘要： The present disclosure relates to a method of manufacturing a transferable lamella comprising interconnected nanostructures, the method comprising the steps of: a) providing a substrate such as a planar substrate; b) forming at least one superstructure on the substrate, said superstructure comprising a plurality of elongated nanostructures (formed e.g. by growth, deposition, and/or etching); wherein the elongated nanostructures are formed such that at least two of said nanostructures are conductively interconnected, and/or wherein at least a first layer is grown or deposited to conductively interconnect or insulate at least a part of the elongated nanostructures; c) encapsulating at least a portion of said superstructure in an encapsulating material, said portion comprising at least two interconnected nanostructures; and d) cutting the encapsulating material in a direction that intersects at least two interconnected nanostructures, thereby manufacturing a transferable lamella comprising interconnected nanostructures. The present disclosure further relates to an electronic device manufactured from one or more of the lamellas provided by the method.