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    SIGNAL CONVERTER AND METHOD FOR OPERATING A SIGNAL CONVERTER
    1.
    发明申请
    SIGNAL CONVERTER AND METHOD FOR OPERATING A SIGNAL CONVERTER 有权
    信号转换器和操作信号转换器的方法

    公开(公告)号：US20150048958A1

    公开(公告)日：2015-02-19

    申请号：US13968036

    申请日：2013-08-15

    申请人： Infineon Technologies AG

    发明人： Heimo Hartlieb ,  Clemens Kain ,  Michael Hausmann

    IPC分类号： H03M1/34 ,  H03M1/00 ,  H03M1/12

    CPC分类号： H03M1/34 ,  H03M1/00 ,  H03M1/001 ,  H03M1/12 ,  H03M1/124 ,  H03M1/129 ,  H03M1/46 ,  H03M2201/4135

    摘要： In accordance with an embodiment, a method for operating a signal converter includes converting an analog input signal to a digital output signal, comprising by comparing the analog input signal to an analog comparison signal, and detecting whether the analog input signal exceeds a predetermined maximum or minimum threshold by comparing the analog input signal to an analog threshold signal. The analog comparison signal and the analog threshold signal are generated by a same digital-to-analog converter.

    摘要翻译： 根据实施例，用于操作信号转换器的方法包括将模拟输入信号转换成数字输出信号，包括通过将模拟输入信号与模拟比较信号进行比较，以及检测模拟输入信号是否超过预定的最大值 通过将模拟输入信号与模拟阈值信号进行比较来获得最小阈值。 模拟比较信号和模拟阈值信号由相同的数模转换器产生。

    METHOD AND DEVICE FOR IMPROVING CONVERGENCE TIME IN CORRELATION-BASED ALGORITHMS
    2.
    发明申请
    METHOD AND DEVICE FOR IMPROVING CONVERGENCE TIME IN CORRELATION-BASED ALGORITHMS 有权
    用于提高基于相关算法的收敛时间的方法和装置

    公开(公告)号：US20140266844A1

    公开(公告)日：2014-09-18

    申请号：US13897604

    申请日：2013-05-20

    申请人： Ahmed Mohamed Abdelatty ALI

    发明人： Ahmed Mohamed Abdelatty ALI

    IPC分类号： H03M1/10

    CPC分类号： H03M1/1071 ,  H03M1/00 ,  H03M1/0641 ,  H03M1/0695 ,  H03M1/1009 ,  H03M1/12 ,  H03M1/164 ,  H03M1/44 ,  H03M2201/4135

    摘要： A method and a corresponding device reduce the convergence time of a correlation algorithm that uses random signals injected into an analog-to-digital converter (ADC) as input to the algorithm. The method and device involve, at a processor of a pipelined ADC, injecting a random signal into each of a plurality of stages in the pipeline and obtaining digital values generated in response to the random signals. Noise components of residue signals in the plurality of stages are calculated as a function of the digital values and values of the random signals. The noise components correspond to the random signals.

    摘要翻译： 一种方法和相应的器件减少了使用注入模数转换器（ADC）的随机信号作为算法输入的相关算法的收敛时间。 该方法和装置涉及在流水线式ADC的处理器处，将随机信号注入流水线中的多个级中的每一级，并获得响应于随机信号产生的数字值。 作为随机信号的数字值和值的函数计算多个级中的残留信号的噪声分量。 噪声分量对应于随机信号。

    Monolithic integrable R-2R network
    3.
    发明授权
    Monolithic integrable R-2R network 失效
    单片可积分R-2R网络

    公开(公告)号：US4381499A

    公开(公告)日：1983-04-26

    申请号：US318887

    申请日：1981-11-06

    申请人： Holger Struthoff

    发明人： Holger Struthoff

    IPC分类号： H03M1/78 ,  H03M1/00 ,  H03K13/02

    CPC分类号： H03M1/00 ,  H03M2201/02 ,  H03M2201/3115 ,  H03M2201/3131 ,  H03M2201/3136 ,  H03M2201/3168 ,  H03M2201/4135 ,  H03M2201/4225 ,  H03M2201/4233 ,  H03M2201/4262 ,  H03M2201/814 ,  H03M2201/931

    摘要： A monolithic integrable R-2R resistor network comprises a number of series resistors connected to a terminal resistor; and a plurality of 2R resistor units each capable of being switched by two electronic switches either to ground or to another reference point, a different plurality of 2R resistor units being coupled to the nodes between each of the series resistors, to the node between the terminal resistor and the last resistor of the series resistors and to the node ahead of the first resistor of the series resistors. To compensate for the effects of the variations of the switch resistances caused during manufacture by process parameter fluctuations upon the accuracy of a D/A converter, a switch structure is inserted at each of the nodes which, with respect to the two electronic switches, is of the same kind, and which is permanently in an electrically conducting state. Preferably, there are used insulated-gate field-effect transistors and insulated-gate field-effect transistor structures, the identical electrodes of which, for example, the source electrodes, are directly connected to each of the nodes.

    摘要翻译： 单片可积分R-2R电阻网络包括连接到端子电阻器的多个串联电阻器; 以及多个2R电阻单元，每个能够被两个电子开关切换到接地或另一个参考点，不同的多个2R电阻单元耦合到每个串联电阻之间的节点到端子之间的节点 电阻器和串联电阻器的最后一个电阻器，并连接到串联电阻器的第一个电阻器前面的节点。 为了补偿由于工艺参数波动而产生的开关电阻的变化对D / A转换器的精度的影响，在每个节点处插入开关结构，相对于两个电子开关 并且永久地处于导电状态。 优选地，使用绝缘栅场效应晶体管和绝缘栅场效应晶体管结构，其相同的电极例如源电极直接连接到每个节点。

    Temperature measurement system
    4.
    发明授权
    Temperature measurement system 有权
    温度测量系统

    公开(公告)号：US09488529B2

    公开(公告)日：2016-11-08

    申请号：US13904649

    申请日：2013-05-29

    申请人： Intel IP Corporation

    发明人： Merit Hong ,  David Harnishfeger ,  Kris Kaufman

    IPC分类号： G01K7/00 ,  G01K7/16 ,  G01K7/22

    CPC分类号： G01K7/16 ,  G01K7/22 ,  H03M1/0617 ,  H03M2201/4135

    摘要： A temperature measurement system is disclosed. In accordance with some embodiments of the present disclosure, a temperature measurement system may comprise a resistor, a thermistor, a resistance-to-current converter configured to generate a current signal based on a resistance, an analog-to-digital converter (ADC) configured to receive a first current signal based on the resistor, convert the first current signal into a first digital signal, receive a second current signal based on the thermistor, and convert the second current signal into a second digital signal, and a calculation stage communicatively coupled to an ADC output and configured to determine a first digital value based on the first digital signal, determine a second digital value based on the second digital signal, calculate a resistance ratio based on the first digital value and the second digital value, and determine a temperature output value based on the resistance ratio.

    摘要翻译： 公开了一种温度测量系统。 根据本公开的一些实施例，温度测量系统可以包括电阻器，热敏电阻器，被配置为基于电阻产生电流信号的电阻 - 电流转换器，模数转换器（ADC） 被配置为基于所述电阻器接收第一电流信号，将所述第一电流信号转换为第一数字信号，基于所述热敏电阻接收第二电流信号，并将所述第二电流信号转换为第二数字信号，以及计算阶段 耦合到ADC输出并且被配置为基于第一数字信号确定第一数字值，基于第二数字信号确定第二数字值，基于第一数字值和第二数字值计算电阻比，并且确定 基于电阻比的温度输出值。

    METHOD OF DYNAMIC ELEMENT MATCHING AND AN APPARATUS THEREOF
    5.
    发明申请
    METHOD OF DYNAMIC ELEMENT MATCHING AND AN APPARATUS THEREOF 有权
    动力元件匹配方法及其装置

    公开(公告)号：US20140176355A1

    公开(公告)日：2014-06-26

    申请号：US13906351

    申请日：2013-05-31

    申请人： Wen-Hsien Chuang ,  Hsiang-Wei Liu ,  Jen-Wei Tsai ,  Ting-Hao Wang

    发明人： Wen-Hsien Chuang ,  Hsiang-Wei Liu ,  Jen-Wei Tsai ,  Ting-Hao Wang

    IPC分类号： H03M1/66

    CPC分类号： H03M1/0665 ,  G06F1/10 ,  H03L7/0814 ,  H03M1/00 ,  H03M1/747 ,  H03M2201/4135

    摘要： A method to reduce the integral non-linearity (INL) of a digital-to-analog converter (DAC) and a DAC implementing said method are disclosed. The method in this invention is a pseudo dynamic element matching (PDEM) method. Compared with a prior art, the method of this invention provides a better performance in glitch. Compared with another prior art, the method of this invention also guarantees that DEM will not fail even if the input digital code remains constant.

    摘要翻译： 公开了一种降低数模转换器（DAC）和实现所述方法的DAC的积分非线性（INL）的方法。 本发明的方法是伪动态元素匹配（PDEM）方法。 与现有技术相比，本发明的方法提供了更好的毛刺性能。 与另一现有技术相比，本发明的方法也保证即使输入的数字代码保持恒定，DEM也不会失效。

    Method and device for improving convergence time in correlation-based algorithms
    7.
    发明授权
    Method and device for improving convergence time in correlation-based algorithms 有权
    在基于相关的算法中改善收敛时间的方法和装置

    公开(公告)号：US08836558B1

    公开(公告)日：2014-09-16

    申请号：US13897604

    申请日：2013-05-20

    申请人： Ahmed Mohamed Abdelatty Ali

    发明人： Ahmed Mohamed Abdelatty Ali

    IPC分类号： H03M1/00 ,  H03M1/10 ,  H03M1/06 ,  H03M1/12

    CPC分类号： H03M1/1071 ,  H03M1/00 ,  H03M1/0641 ,  H03M1/0695 ,  H03M1/1009 ,  H03M1/12 ,  H03M1/164 ,  H03M1/44 ,  H03M2201/4135

    摘要： A method and a corresponding device reduce the convergence time of a correlation algorithm that uses random signals injected into an analog-to-digital converter (ADC) as input to the algorithm. The method and device involve, at a processor of a pipelined ADC, injecting a random signal into each of a plurality of stages in the pipeline and obtaining digital values generated in response to the random signals. Noise components of residue signals in the plurality of stages are calculated as a function of the digital values and values of the random signals. The noise components correspond to the random signals.

    摘要翻译： 一种方法和相应的器件减少了使用注入模数转换器（ADC）的随机信号作为算法输入的相关算法的收敛时间。 该方法和装置涉及在流水线式ADC的处理器处，将随机信号注入流水线中的多个级中的每一级，并获得响应于随机信号产生的数字值。 作为随机信号的数字值和值的函数计算多个级中的残留信号的噪声分量。 噪声分量对应于随机信号。

    Charge-transfer coded-voltage generator for use in analog-digital coders and decoders
    9.
    发明授权
    Charge-transfer coded-voltage generator for use in analog-digital coders and decoders 失效
    电荷传输编码电压发生器，用于模拟数字编码器和解码器

    公开(公告)号：US4350976A

    公开(公告)日：1982-09-21

    申请号：US215134

    申请日：1980-12-10

    申请人： Roger Benoit-Gonin ,  Jean L. Berger ,  Jean L. Coutures

    发明人： Roger Benoit-Gonin ,  Jean L. Berger ,  Jean L. Coutures

    IPC分类号： H03M1/66 ,  H03M1/00 ,  H03K13/02

    CPC分类号： H03M1/00 ,  H03M2201/02 ,  H03M2201/2241 ,  H03M2201/2266 ,  H03M2201/2291 ,  H03M2201/3105 ,  H03M2201/3178 ,  H03M2201/4135 ,  H03M2201/4212 ,  H03M2201/4233 ,  H03M2201/4262 ,  H03M2201/81 ,  H03M2201/8128 ,  H03M2201/814 ,  H03M2201/837

    摘要： Successive two-trip traversals of charges between gates G.sub.0 and G.sub.2 make it possible to obtain beneath gates G.sub.1 and G.sub.2 quantities of charges equal to Q.sub.R, Q.sub.R /2, Q.sub.R /2.sup.2 . . . Q.sub.R /2.sup.i. A readout device for reading charges and connected to gates G.sub.2 and G.sub.4 generates voltages V.sub.R and V.sub.Ri =a.sub.0 .multidot.V.sub.R +a.sub.1 .multidot.V.sub.R /2+ . . . +a.sub.i-1 .multidot.V.sub.R /2.sup.i-1 +V.sub.R /2.sup.i which are compared with a voltage sample V.sub.x to be coded in order to determine by successive approximations the coefficients a.sub.0 . . . a.sub.n which are equal to 0 or to 1 such that V.sub.x =a.sub.0 .multidot.V.sub.R +a.sub.1 .multidot.V.sub.R /2+ . . . +a.sub.n .multidot.V.sub.R /2.sup.n. Depending on the value of a.sub.i, each quantity of charges Q.sub.R /2.sup.i stored beneath gate G.sub.1 is removed beneath diode D.sub.e or stored beneath gate G.sub.3 and then transferred beneath gate G.sub.4.

    摘要翻译： 栅极G0和G2之间的电荷的连续两次跳变使得可以获得栅极G1和G2之下的等于QR，QR / 2，QR / 22的电荷量。 。 。 QR / 2i 用于读取电荷并连接到门G2和G4的读出装置产生电压VR和VRi = a0xVR + a1xVR / 2 +。 。 。 + ai-1xVR / 2i-1 + VR / 2i，其与要编码的电压采样Vx进行比较，以便通过逐次逼近来确定系数a0。 。 。 a等于0或1，使得Vx = a0xVR + a1xVR / 2 +。 。 。 + anxVR / 2n。 根据ai的值，存储在栅极G1下方的每个电荷量QR / 2i在二极管De下方被去除或存储在栅极G3下方，然后在栅极G4下方传送。