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公开(公告)号：US09880211B2
公开(公告)日：2018-01-30
申请号：US15058757
申请日：2016-03-02
申请人： FUJITSU LIMITED
发明人： Yoichi Kawano
CPC分类号： G01R29/26 , G01R31/2822 , G01R31/2884 , H03B1/00 , H03B2200/00 , H03L2207/00
摘要： A semiconductor integrated circuit includes a harmonic oscillator circuit, a first switch circuit configured to cause an oscillating state of the harmonic oscillator circuit to switch between an “on” state and an “off” state, a detector circuit configured to produce a voltage responsive to an amplitude of the oscillating output of the harmonic oscillator circuit, a decision circuit configured to detect whether the voltage produced by the detector circuit exceeds a threshold in synchronization with a clock signal, and a second switch circuit configured to control whether or not to apply noise from a noise source to the harmonic oscillator circuit.
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公开(公告)号：US09252792B2
公开(公告)日：2016-02-02
申请号：US14275861
申请日：2014-05-12
发明人： Rajavelu Thinakaran
CPC分类号： H03L7/0991 , H03K3/0315 , H03L7/02 , H03L7/06 , H03L7/099 , H03L7/105 , H03L2207/00
摘要： A tunable DCO (digitally controlled oscillator), for example, includes a clock generator that is arranged to provide a converter clock signal for driving a frequency-to-voltage (F2V) converter. The F2V converter, for example, includes a frequency target control input for selecting an operational frequency and in response generates a frequency control signal using a DAC (digital-to-analog converter). The example F2V converter is arranged using a split capacitor DAC to provide a linear voltage response over a range of trim codes. The clock generator is arranged to generate the converter clock signal in response to the frequency control signal.
摘要翻译： 例如，可调谐DCO（数字控制振荡器）包括时钟发生器，其被配置为提供用于驱动频率 - 电压（F2V）转换器的转换器时钟信号。 F2V转换器例如包括用于选择工作频率的频率目标控制输入，并且响应于使用DAC（数模转换器）产生频率控制信号。 示例F2V转换器使用分离电容DAC来布置，以在一系列修剪代码上提供线性电压响应。 时钟发生器被布置成响应于频率控制信号而产生转换器时钟信号。
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公开(公告)号：US20150042365A1
公开(公告)日：2015-02-12
申请号：US14044884
申请日：2013-10-03
发明人： Yu-Nan Tsai , Kai-Wen Cheng , Chia-Hao Hsu , Chun-Lai Hsiao
IPC分类号： G01B7/00
CPC分类号： G02B1/00 , G01D5/24 , H01L21/00 , H03L1/00 , H03L2207/00
摘要： A detection circuit is provided. A detection signal corresponding to an equivalent capacitance value of a micro-electro-mechanical system is generated by an oscillator, and the equivalent capacitance value of the micro-electro-mechanical system varies with a location of the micro-electro-mechanical system.
摘要翻译： 提供检测电路。 通过振荡器产生与微机电系统的等效电容值相对应的检测信号，微机电系统的等效电容值随着微机电系统的位置而变化。
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公开(公告)号：US20160266187A1
公开(公告)日：2016-09-15
申请号：US15058757
申请日：2016-03-02
申请人： FUJITSU LIMITED
发明人： Yoichi Kawano
IPC分类号： G01R29/26 , G01R19/165 , G01R31/28
CPC分类号： G01R29/26 , G01R31/2822 , G01R31/2884 , H03B1/00 , H03B2200/00 , H03L2207/00
摘要： A semiconductor integrated circuit includes a harmonic oscillator circuit, a first switch circuit configured to cause an oscillating state of the harmonic oscillator circuit to switch between an “on” state and an “off” state, a detector circuit configured to produce a voltage responsive to an amplitude of the oscillating output of the harmonic oscillator circuit, a decision circuit configured to detect whether the voltage produced by the detector circuit exceeds a threshold in synchronization with a clock signal, and a second switch circuit configured to control whether or not to apply noise from a noise source to the harmonic oscillator circuit.
摘要翻译： 半导体集成电路包括谐波振荡器电路，第一开关电路，其被配置为使得谐波振荡器电路的振荡状态在“接通”状态和“断开”状态之间切换，检测器电路被配置为产生响应于 谐波振荡电路的振荡输出的振幅;判定电路，被配置为检测由所述检测器电路产生的电压是否与时钟信号同步地超过阈值;以及第二开关电路，被配置为控制是否施加噪声 从噪声源到谐波振荡器电路。
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公开(公告)号：US06313622B1
公开(公告)日：2001-11-06
申请号：US09484227
申请日：2000-01-18
申请人： Takahiro Seki , Katsunori Seno
发明人： Takahiro Seki , Katsunori Seno
IPC分类号： G01R2500
CPC分类号： H03L7/0814 , H03K5/133 , H03K5/135 , H03K19/00384 , H03K2005/00104 , H03L7/091 , H03L2207/00
摘要： A power source voltage controller which can set the optimal margin for a replica circuit and shorten the time for the power source voltage to converge to the optimal value, having a replica circuit for monitoring a delay time of a critical path by propagating a reference signal having a power source voltage-delay characteristic approximately equivalent to a critical path in a semiconductor circuit, a phase difference detection circuit and an encoder receiving a delay signal by the replica circuit and the reference signal and detecting the phase difference of the delay signal from the reference signal and outputting the detection result as phase difference information, voltage control circuits for generating a power source voltage of a value based on a phase difference information signal and supplying it to the semiconductor circuit and the replica circuit, and a delay error correction circuit arranged at the input side of the reference signal of the replica circuit and correcting the delay difference with the critical path.
摘要翻译： 一种电源电压控制器，其可以设置复制电路的最佳余量并缩短电源电压收敛到最佳值的时间，具有用于通过传播具有关键路径的延迟时间的参考信号来监视关键路径的延迟时间的复制电路， 大致相当于半导体电路中的关键路径的电源电压延迟特性，相位差检测电路和由复制电路接收延迟信号的编码器和参考信号，并检测来自参考的延迟信号的相位差 信号并输出检测结果作为相位差信息;电压控制电路，用于产生基于相位差信息信号的值的电源电压并将其提供给半导体电路和复制电路;以及延迟误差校正电路，布置在 复制电路的参考信号的输入侧并校正d 与关键路线的差距。
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公开(公告)号：US09270283B2
公开(公告)日：2016-02-23
申请号：US14266337
申请日：2014-04-30
发明人： Zhigang Fu
CPC分类号： H03L7/06 , H03L7/02 , H03L7/099 , H03L7/105 , H03L2207/00
摘要： A frequency generation device is provided. The frequency generation device includes a voltage generation unit configured to receive an input signal having an input frequency and to generate a feedback voltage based on the input signal, wherein the feedback voltage is proportional to the input frequency; and a feedback unit connected to the voltage generation unit and a reference voltage source, wherein the feedback unit is configured to receive a reference voltage from the reference voltage source and the feedback voltage from the voltage generation unit, so as to generate a feedback signal having a feedback frequency.
摘要翻译： 提供了频率发生装置。 频率发生装置包括：电压生成单元，被配置为接收具有输入频率的输入信号，并且基于输入信号产生反馈电压，其中反馈电压与输入频率成比例; 以及连接到电压产生单元和参考电压源的反馈单元，其中反馈单元被配置为从参考电压源接收参考电压和来自电压产生单元的反馈电压，以便产生具有 反馈频率。
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公开(公告)号：US20150326231A1
公开(公告)日：2015-11-12
申请号：US14275861
申请日：2014-05-12
发明人： Rajavelu Thinakaran
CPC分类号： H03L7/0991 , H03K3/0315 , H03L7/02 , H03L7/06 , H03L7/099 , H03L7/105 , H03L2207/00
摘要： A tunable DCO (digitally controlled oscillator), for example, includes a clock generator that is arranged to provide a converter clock signal for driving a frequency-to-voltage (F2V) converter. The F2V converter, for example, includes a frequency target control input for selecting an operational frequency and in response generates a frequency control signal using a DAC (digital-to-analog converter). The example F2V converter is arranged using a split capacitor DAC to provide a linear voltage response over a range of trim codes. The clock generator is arranged to generate the converter clock signal in response to the frequency control signal.
摘要翻译： 例如，可调谐DCO（数字控制振荡器）包括时钟发生器，其被配置为提供用于驱动频率 - 电压（F2V）转换器的转换器时钟信号。 F2V转换器例如包括用于选择工作频率的频率目标控制输入，并且响应于使用DAC（数模转换器）产生频率控制信号。 示例F2V转换器使用分离电容DAC来布置，以在一系列修剪代码上提供线性电压响应。 时钟发生器被布置成响应于频率控制信号而产生转换器时钟信号。
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公开(公告)号：US20140368282A1
公开(公告)日：2014-12-18
申请号：US14266337
申请日：2014-04-30
发明人： Zhigang FU
IPC分类号： H03L7/06
CPC分类号： H03L7/06 , H03L7/02 , H03L7/099 , H03L7/105 , H03L2207/00
摘要： A frequency generation device is provided. The frequency generation device includes a voltage generation unit configured to receive an input signal having an input frequency and to generate a feedback voltage based on the input signal, wherein the feedback voltage is proportional to the input frequency; and a feedback unit connected to the voltage generation unit and a reference voltage source, wherein the feedback unit is configured to receive a reference voltage from the reference voltage source and the feedback voltage from the voltage generation unit, so as to generate a feedback signal having a feedback frequency.
摘要翻译： 提供了频率发生装置。 频率发生装置包括：电压生成单元，被配置为接收具有输入频率的输入信号，并且基于输入信号产生反馈电压，其中反馈电压与输入频率成比例; 以及连接到电压产生单元和参考电压源的反馈单元，其中反馈单元被配置为从参考电压源接收参考电压和来自电压产生单元的反馈电压，以便产生具有 反馈频率。
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公开(公告)号：US20180331818A1
公开(公告)日：2018-11-15
申请号：US16042425
申请日：2018-07-23
申请人： Ciena Corporation
CPC分类号： H04L7/0331 , H03L7/00 , H03L7/06 , H03L7/0807 , H03L2207/00 , H03L2207/06 , H03L2207/18 , H04B10/40
摘要： A method for clock recovery that may include obtaining an output signal from a phase locked loop (PLL) device. The method may further include determining, using a digital phase detector, the output signal, and a transmitter clock signal, an amount of phase difference between the output signal and the transmitter clock signal. The method may further include filtering, using a phase rotator and a digital accumulator, a portion of the amount of phase difference from the output signal to generate a filtered signal.
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公开(公告)号：US10063367B1
公开(公告)日：2018-08-28
申请号：US15581676
申请日：2017-04-28
申请人： Ciena Corporation
CPC分类号： H04B10/40 , H03L7/00 , H03L7/06 , H03L7/0807 , H03L7/081 , H03L7/085 , H03L7/087 , H03L7/099 , H03L7/18 , H03L2207/00 , H03L2207/06 , H03L2207/18
摘要： A method for clock recovery that may include obtaining an output signal from a phase locked loop (PLL) device. The method may further include determining, using a digital phase detector, the output signal, and a transmitter clock signal, an amount of phase difference between the output signal and the transmitter clock signal. The method may further include filtering, using a phase rotator and a digital accumulator, a portion of the amount of phase difference from the output signal to generate a filtered signal.
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