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    Accurate Reduced Gate-Drive Current Limiter
    1.
    发明公开
    Accurate Reduced Gate-Drive Current Limiter 审中-公开

    公开(公告)号：US20240259014A1

    公开(公告)日：2024-08-01

    申请号：US18435509

    申请日：2024-02-07

    Applicant: pSemi Corporation

    Inventor： Satish Kumar Vangara ,  Antony Christopher Routledge ,  Gregory Szczeszynski ,  Xiaowu Sun

    IPC: H03K17/082 ,  H03K5/08

    CPC classification number: H03K17/0822 ,  H03K5/086

    Abstract: Circuits and methods that limit current through power FETs of power converter to reduce damaging current in-rush events, independent of switching frequency, device mismatches, and PVT variations. Embodiments utilize a closed-loop feedback circuit and/or a calibrated compensation circuit to regulate, substantially independent of frequency, the control voltage VGATE applied to a power FET gate. In a reduced gate-drive mode, connecting a feedback or compensation circuit to the gate of an LDO source-follower FET allows the gate voltage to be regulated to control the LDO output voltage to a final inverter coupled to the gate of a power FET so that VGATE is adjusted to provide a reduced gate-drive to the power FET; connecting to the output of the LDO allows the LDO output voltage to the final inverter to be directly regulated to adjust VGATE; connecting to the gate of the power FET allows VGATE to be directly set.

    CLOCK DISTRIBUTION
    2.
    发明申请
    CLOCK DISTRIBUTION 审中-公开

    公开(公告)号：US20190229711A1

    公开(公告)日：2019-07-25

    申请号：US16244025

    申请日：2019-01-09

    Applicant: Socionext Inc.

    Inventor： Sylvain PANIER ,  Behzad Farzaneh ,  Darren Walker ,  Ian Juso Dedic

    IPC: H03K3/012 ,  H03K3/017 ,  G06F1/10

    CPC classification number: H03K3/012 ,  G06F1/10 ,  H03K3/017 ,  H03K5/086 ,  H03K5/1565

    Abstract: Clock distribution circuitry configured for duty cycle control, the circuitry comprising: a plurality of buffers connected in series along a clock path, each of the buffers having an input terminal and an output terminal, the input terminal being connected to the clock path via a corresponding AC coupling capacitor, and the clock, path configured to receive an input clock signal at its input node and output an output clock signal at its output node, the output clock signal having an output duty cycle; and control circuitry connected to apply a DC bias signal to the input terminal of each of the plurality of buffers, wherein the control circuitry is configured to: obtain a measurement signal indicative of the output duty cycle; and control the DC bias signals, based on a difference between the measurement signal and a reference signal, so as to control the output duty cycle.

    Boiler control comprising analog up/down timer circuit for generating variable threshold signal
    4.
    发明授权
    Boiler control comprising analog up/down timer circuit for generating variable threshold signal 有权

    公开(公告)号：US09631838B2

    公开(公告)日：2017-04-25

    申请号：US15017054

    申请日：2016-02-05

    Applicant: Martin Kanner

    Inventor： Martin Kanner ,  Arthur Bauman

    IPC: H04L25/02 ,  F24H9/20 ,  F24H9/12 ,  H03K5/08 ,  H03K3/0231

    CPC classification number: F24D19/1009 ,  F24D3/02 ,  F24H9/122 ,  F24H9/2035 ,  H02M3/07 ,  H03K3/0231 ,  H03K5/086

    Abstract: An apparatus comprises a sensor circuit configured to detect activation of at least one circulator arranged to circulate liquid from a boiler through at least one circulation loop and back to the boiler. An analog up/down timer circuit has an input coupled to an output of the sensor circuit and generates a variable threshold signal that varies as a function of an activation time of the at least one circulator. A burner control circuit receives the variable threshold signal from the analog up/down timer circuit and generates an ignition control signal based at least in part on comparison of a temperature sensor signal of the boiler with the variable threshold signal. An ignition driver receives the ignition control signal from the burner control circuit and generates an ignition signal for a burner configured to burn fuel to heat the liquid in the boiler based at least in part on the ignition control signal.

    CIRCUIT FOR CLAMPING CURRENT IN A CHARGE PUMP
    5.
    发明申请
    CIRCUIT FOR CLAMPING CURRENT IN A CHARGE PUMP 审中-公开
    用于在充电泵中钳位电流的电路

    公开(公告)号：US20160359408A1

    公开(公告)日：2016-12-08

    申请号：US15174050

    申请日：2016-06-06

    Applicant: Conversant Intellectual Property Management Inc.

    Inventor： Peter Vlasenko ,  Huy Tuong Mai

    IPC: H02M3/07 ,  H03K5/08

    CPC classification number: H02M3/07 ,  G05F1/625 ,  G05F3/02 ,  H02M1/34 ,  H02M3/073 ,  H03K5/086 ,  H03L7/0895

    Abstract: A circuit for clamping current in a charge pump is disclosed. The charge pump includes switching circuitry having a number of switching circuitry transistors. Each of first and second pairs of transistors in the circuit can provide an additional path for current from its associated one of the switching circuitry transistors during off-switching of that transistor so that a spike in current from the switching circuitry transistor is only partially transmitted through a path extending between the switching circuitry transistor and a capacitor of the charge pump.

    Abstract translation: 公开了一种用于钳位电荷泵中的电流的电路。 电荷泵包括具有多个开关电路晶体管的开关电路。 电路中的第一和第二对晶体管中的每一个可以在该晶体管截止期间从其相关联的一个开关电路晶体管提供电流的附加路径，使得来自开关电路晶体管的电流尖峰仅部分地透过 在开关电路晶体管和电荷泵的电容器之间延伸的路径。

    Integrated circuit devices using analog dividers
    7.
    发明授权
    Integrated circuit devices using analog dividers 有权
    使用模拟分频器的集成电路器件

    公开(公告)号：US08754719B1

    公开(公告)日：2014-06-17

    申请号：US13334535

    申请日：2011-12-22

    Applicant: Justin O'Day

    Inventor： Justin O'Day

    IPC: H03B5/08

    CPC classification number: H03B19/14 ,  H03K5/086 ,  H03K23/50

    Abstract: A divider for use in an integrated circuit chip, such as a clock generator chip, includes a ramp generator circuit configured to generate a ramp signal and a synchronous detector circuit configured to receive the ramp signal and an input clock signal and to responsively control the ramp signal generator circuit to generate an output clock signal at an output of the synchronous detector circuit. In some embodiments, the synchronous detector circuit may include a voltage threshold detector circuit configured to receive the ramp signal and to generate a detection signal responsive thereto and a synchronous latch circuit having a clock input configured to receive the input clock signal and a data input configured to receive the detection signal. The synchronous latch circuit may be configured to control the ramp generator circuit.

    Abstract translation: 用于诸如时钟发生器芯片的集成电路芯片中的分压器包括：斜坡发生器电路，其被配置为产生斜坡信号;以及同步检测器电路，其被配置为接收斜坡信号和输入时钟信号，并且响应地控制斜坡 信号发生器电路，以在同步检测器电路的输出端产生输出时钟信号。 在一些实施例中，同步检测器电路可以包括电压阈值检测器电路，其被配置为接收斜坡信号并响应于此产生检测信号;以及同步锁存电路，具有配置成接收输入时钟信号的时钟输入和配置的数据输入 以接收检测信号。 同步锁存电路可以被配置为控制斜坡发生器电路。

    Circuit for Clamping Current in a Charge Pump
    9.
    发明申请
    Circuit for Clamping Current in a Charge Pump 有权

    公开(公告)号：US20130234787A1

    公开(公告)日：2013-09-12

    申请号：US13873503

    申请日：2013-04-30

    Applicant: MOSAID TECHNOLOGIES, INC.

    Inventor： Peter Vlasenko ,  Huy Tuong Mai

    IPC: G05F3/02

    CPC classification number: H02M3/07 ,  G05F1/625 ,  G05F3/02 ,  H02M1/34 ,  H02M3/073 ,  H03K5/086 ,  H03L7/0895

    Abstract: A circuit for clamping current in a charge pump is disclosed. The charge pump includes switching circuitry having a number of switching circuitry transistors. Each of first and second pairs of transistors in the circuit can provide an additional path for current from its associated one of the switching circuitry transistors during off-switching of that transistor so that a spike in current from the switching circuitry transistor is only partially transmitted through a path extending between the switching circuitry transistor and a capacitor of the charge pump.

    Trimming of operative parameters in electronic devices based on corrections mappings
    10.
    发明授权
    Trimming of operative parameters in electronic devices based on corrections mappings 有权
    基于校正映射修剪电子设备中的操作参数

    公开(公告)号：US08447571B2

    公开(公告)日：2013-05-21

    申请号：US12970771

    申请日：2010-12-16

    Applicant: Donghyun Seo ,  Kijun Nam ,  Seokseong Yoon

    Inventor： Donghyun Seo ,  Kijun Nam ,  Seokseong Yoon

    IPC: H03F1/26

    CPC classification number: H03K5/086 ,  G01R31/30 ,  G01R31/3004 ,  G01R31/318357

    Abstract: An embodiment of an electronic device having a plurality of operative parameters is provided. The electronic device includes means for applying a plurality of trimming actions to each parameter for causing a corresponding correction of the parameter, for at least one reference parameter, means for measuring the reference parameter responsive to the application of at least part of the trimming actions, and means for forcing the application of the selected trimming action for the reference parameter. For each non-reference parameter different from the at least one reference parameter, the electronic device includes means for selecting one of the trimming actions for the non-reference parameter corresponding to the selected trimming action for the at least one reference parameter, and means for forcing the application of the selected trimming action for each non-reference parameter.

    Abstract translation: 提供具有多个操作参数的电子设备的实施例。 电子设备包括用于对每个参数应用多个修剪动作以对于至少一个参考参数进行参数的对应校正的装置，用于响应于至少部分修整动作的应用来测量参考参数的装置， 以及用于强制对所述参考参数应用所选择的修剪动作的装置。 对于与所述至少一个参考参数不同的每个非参考参数，所述电子设备包括用于为所述至少一个参考参数选择对应于所选择的修剪动作的非参考参数的修整动作中的一个的装置，以及用于 强制对每个非参考参数应用所选择的修剪动作。

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