知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

46 records (took 0.012 seconds)

    MINIMIZING STARTUP TRANSIENTS IN AN AUDIO PLAYBACK PATH
    1.
    发明申请
    MINIMIZING STARTUP TRANSIENTS IN AN AUDIO PLAYBACK PATH 有权

    公开(公告)号：US20170374456A1

    公开(公告)日：2017-12-28

    申请号：US15195626

    申请日：2016-06-28

    Applicant: Cirrus Logic International Semiconductor Ltd.

    Inventor： Tejasvi DAS ,  Anand ILANGO

    IPC: H04R3/00 ,  H03F3/181 ,  H03F3/20

    CPC classification number: H04R3/007 ,  H03F1/305 ,  H03F1/34 ,  H03F3/181 ,  H03F3/187 ,  H03F3/20 ,  H03F3/72 ,  H03F2200/03 ,  H03F2200/129 ,  H03F2200/381 ,  H03F2200/408 ,  H03G3/348 ,  H03M1/66

    Abstract: A method may be provided for powering up or down a playback path comprising a digital-to-analog converter (DAC) for generating a non-ground-centered analog intermediate voltage centered at a common-mode voltage and coupled to a driver for generating a ground-centered playback path output voltage at an output of the driver wherein the output of the driver is clamped via a finite impedance to a ground voltage. The method may include transitioning continuously or in a plurality of discrete steps the analog intermediate voltage from an initial voltage to the common-mode voltage such that the transitioning is substantially inaudible at the output of the driver. A method for operating an output clamp of an output driver stage of a playback path may include transitioning continuously or in a plurality of discrete steps an impedance of the output clamp in order to match an output offset of the output driver stage in order to minimize audio artifacts appearing at an output of the output driver stage.

    AMPLIFIER ARCHITECTURE FOR POLAR MODULATION
    4.
    发明申请
    AMPLIFIER ARCHITECTURE FOR POLAR MODULATION 有权
    极化调制放大器结构

    公开(公告)号：US20100156540A1

    公开(公告)日：2010-06-24

    申请号：US12440946

    申请日：2007-09-10

    Applicant: Antonius J. M. De Graauw ,  Leon C. M. Van Den Oever

    Inventor： Antonius J. M. De Graauw ,  Leon C. M. Van Den Oever

    IPC: H03F3/68

    CPC classification number: H03F1/32 ,  H03C5/00 ,  H03F1/0205 ,  H03F1/0222 ,  H03F3/24 ,  H03F2200/324 ,  H03F2200/381 ,  H03F2200/417 ,  H03F2200/504 ,  H04L27/34 ,  H04L27/361

    Abstract: The present invention relates to an electronic device for power efficient linear amplification. The electronic device includes an amplifier (RF-PA) for amplifying a phase modulated signal (PM). The amplifier (RF-PA) is adapted to be controlled by a first modulating signal (AM high) for modulating the amplitude of the phase modulated signal (PM) above a predetermined amplitude value. The electronic device is further adapted to attenuate an output signal of the amplifier (RF-PA) for providing amplitude modulation below the predetermined amplitude value.

    Abstract translation: 本发明涉及一种用于功率效率线性放大的电子设备。 电子设备包括用于放大相位调制信号（PM）的放大器（RF-PA）。 放大器（RF-PA）适于由第一调制信号（AM高）控制，用于将相位调制信号（PM）的振幅调制在预定振幅值以上。 电子设备还适于衰减放大器（RF-PA）的输出信号，以提供低于预定振幅值的幅度调制。

    Filter calibration with cell re-use
    5.
    发明授权
    Filter calibration with cell re-use 有权
    过滤器校准与细胞再使用

    公开(公告)号：US07471142B2

    公开(公告)日：2008-12-30

    申请号：US11430575

    申请日：2006-05-09

    Applicant: Qiang (Tom) Li ,  Hooman Darabi

    Inventor： Qiang (Tom) Li ,  Hooman Darabi

    IPC: H03B1/00

    CPC classification number: H03H11/0472 ,  H03F3/72 ,  H03F2200/381 ,  H03F2203/7221 ,  H03H11/0444 ,  H03H11/52 ,  H03H2210/025 ,  H03H2210/036 ,  H03H2210/04

    Abstract: Various embodiments are disclosed relating filter calibration with cell re-use. According to an example embodiment, an apparatus includes a first circuit, including a variable circuit element. The first circuit is adapted to output an output frequency signal during a calibration mode and to operate as a filter during a filter mode. A control circuit is coupled to the first circuit and is adapted to receive a reference frequency signal and to calibrate the first circuit by adjusting the variable circuit element based on the reference frequency signal and the output frequency signal during the calibration mode. The calibrated first circuit is configured to then operate as a filter during the filter mode.

    Abstract translation: 公开了关于过滤器校准与细胞再利用的各种实施例。 根据示例实施例，一种装置包括包括可变电路元件的第一电路。 第一电路适于在校准模式期间输出输出频率信号，并且在滤波器模式期间用作滤波器。 控制电路耦合到第一电路，并且适于接收参考频率信号并且通过在校准模式期间基于参考频率信号和输出频率信号调整可变电路元件来校准第一电路。 校准的第一电路被配置为在滤波器模式期间作为滤波器工作。

    Cascode gain boosting and linear gain control using gate resistor
    7.
    发明授权
    Cascode gain boosting and linear gain control using gate resistor 有权

    公开(公告)号：US11777451B2

    公开(公告)日：2023-10-03

    申请号：US17933340

    申请日：2022-09-19

    Applicant: pSemi Corporation

    Inventor： David Kovac ,  Joseph Golat

    IPC: H03F1/22 ,  H03F3/72 ,  H03F3/195 ,  H03F1/56

    CPC classification number: H03F1/223 ,  H03F1/565 ,  H03F3/195 ,  H03F3/72 ,  H03F2200/294 ,  H03F2200/381 ,  H03F2200/451

    Abstract: Methods and apparatuses for controlling gain of a single stage cascode FET amplifier are presented. According to one aspect, a series-connected resistor and capacitor is coupled to a gate of a cascode FET transistor of the amplifier, the capacitor providing a short at frequencies of operation of the amplifier. According to another aspect, values of the resistor can be used to control gain of the amplifier. According to yet another aspect, the resistor is a variable resistor whose value can be controlled/adjusted to provide different gains of the amplifier according to a linear function of the resistor value. An input matching network coupled to an input of the amplifier can be used to compensate for different noise figure degradations from different values of the resistor.

    POWER AMPLIFICATION MODULE
    8.
    发明申请
    POWER AMPLIFICATION MODULE 审中-公开

    公开(公告)号：US20180287571A1

    公开(公告)日：2018-10-04

    申请号：US15995202

    申请日：2018-06-01

    Applicant: Murata Manufacturing Co., Ltd.

    Inventor： Shigeki KOYA

    IPC: H03F1/56 ,  H03F1/02 ,  H03F3/19 ,  H03F3/21 ,  H03F1/32 ,  H03F3/217 ,  H03F3/24

    CPC classification number: H03F1/565 ,  H03F1/0211 ,  H03F1/3205 ,  H03F3/19 ,  H03F3/21 ,  H03F3/217 ,  H03F3/2176 ,  H03F3/245 ,  H03F2200/381 ,  H03F2200/387 ,  H03F2200/391 ,  H03F2200/451

    Abstract: A power amplification module includes: an amplifier that amplifies an input signal and outputs an amplified signal; and a harmonic-termination circuit to which harmonics of the amplified signal are input and the impedance of which is controlled in accordance with the frequency of a harmonic. The power amplification module can operate in a first mode in which a power supply voltage changes in accordance with the average voltage value of the amplified signal over a prescribed time period or in a second mode in which the power supply voltage changes in accordance with the envelope of the input signal. The impedance of the harmonic-termination circuit is controlled such that at least one even-ordered harmonic is short-circuited when the power amplification module operates in the first mode and at least one odd-ordered harmonic of third order or higher is short-circuited when the power amplification module operates in the second mode.

    POWER AMPLIFICATION MODULE
    9.
    发明申请
    POWER AMPLIFICATION MODULE 有权

    公开(公告)号：US20170310287A1

    公开(公告)日：2017-10-26

    申请号：US15413763

    申请日：2017-01-24

    Applicant: Murata Manufacturing Co., Ltd.

    Inventor： Shigeki KOYA

    IPC: H03F1/56 ,  H03F3/21 ,  H03F1/02 ,  H03F3/19

    CPC classification number: H03F1/565 ,  H03F1/0211 ,  H03F1/3205 ,  H03F3/19 ,  H03F3/21 ,  H03F3/217 ,  H03F3/2176 ,  H03F3/245 ,  H03F2200/381 ,  H03F2200/387 ,  H03F2200/391 ,  H03F2200/451

    Abstract: A power amplification module includes: an amplifier that amplifies an input signal and outputs an amplified signal; and a harmonic-termination circuit to which harmonics of the amplified signal are input and the impedance of which is controlled in accordance with the frequency of a harmonic. The power amplification module can operate in a first mode in which a power supply voltage changes in accordance with the average voltage value of the amplified signal over a prescribed time period or in a second mode in which the power supply voltage changes in accordance with the envelope of the input signal. The impedance of the harmonic-termination circuit is controlled such that at least one even-ordered harmonic is short-circuited when the power amplification module operates in the first mode and at least one odd-ordered harmonic of third order or higher is short-circuited when the power amplification module operates in the second mode.

Patent Agency Ranking