公开(公告)号：US20170005174A1

公开(公告)日：2017-01-05

申请号：US15193367

申请日：2016-06-27

Applicant: SII Semiconductor Corporation

Inventor： Hitomi SAKURAI

IPC: H01L29/43 ,  H01L29/40

CPC classification number: H01L21/0273 ,  H01L21/28123 ,  H01L21/32139 ,  H01L29/66575 ,  H01L2224/80874 ,  H01L2224/81874 ,  H01L2224/8188

Abstract: Provided is a method of manufacturing a semiconductor device, for suppressing channeling that may occur during ion implantation to a polycrystalline silicon layer (4), the method including: exposing, in an opening portion formed in a second photoresist layer (8), a first photoresist layer (5) that has been used for patterning the polycrystalline silicon layer (4); and implanting impurities by ion implantation with the first photoresist layer (5) being a mask for a gate electrode (4-1) formed of the polycrystalline silicon layer (4).

Abstract translation: 提供一种制造半导体器件的方法，用于抑制离子注入期间可能发生的多晶硅层（4）的沟道化，该方法包括：在形成于第二光致抗蚀剂层（8）的开口部分中暴露第一 已经用于图案化多晶硅层（4）的光致抗蚀剂层（5）; 以及通过第一光致抗蚀剂层（5）作为由多晶硅层（4）形成的栅电极（4-1）的掩模，通过离子注入植入杂质。

公开(公告)号：US20180301609A1

公开(公告)日：2018-10-18

申请号：US16006857

申请日：2018-06-13

Applicant: Epistar Corporation ,  IMEC Taiwan Co.

Inventor： Guan Ru He ,  Jui-Hung Yeh ,  Kevin T. Y. Huang ,  Chih Chung Chen

IPC: H01L33/62 ,  H01L21/683 ,  H01L25/075 ,  H01L23/00 ,  H01L33/48 ,  H01L33/36 ,  H01L27/15

CPC classification number: H01L33/62 ,  H01L21/6835 ,  H01L21/6836 ,  H01L24/29 ,  H01L24/40 ,  H01L24/48 ,  H01L24/64 ,  H01L24/66 ,  H01L24/69 ,  H01L24/73 ,  H01L24/80 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L24/89 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0753 ,  H01L27/153 ,  H01L33/36 ,  H01L33/486 ,  H01L2221/68304 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68359 ,  H01L2221/68372 ,  H01L2221/68381 ,  H01L2224/29194 ,  H01L2224/32 ,  H01L2224/40245 ,  H01L2224/48091 ,  H01L2224/48245 ,  H01L2224/64 ,  H01L2224/73251 ,  H01L2224/80 ,  H01L2224/80006 ,  H01L2224/8085 ,  H01L2224/80862 ,  H01L2224/80874 ,  H01L2224/84439 ,  H01L2224/84444 ,  H01L2224/84447 ,  H01L2224/84455 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2224/89 ,  H01L2224/9222 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/12041 ,  H01L2933/0016 ,  H01L2933/0066 ,  H01L2224/45099 ,  H01L2224/69 ,  H01L2224/83 ,  H01L2224/08 ,  H01L2224/85 ,  H01L2224/84 ,  H01L2924/00012 ,  H01L2224/37099

Abstract: LED chip packaging assembly that facilitates an integrated method for mounting LED chips as a group to be pre-wired to be electrically connected to each other through a pattern of extendable metal wiring lines is provided. LED chips which are electrically connected to each other through extendable metal wiring lines, replace pick and place mounting and the wire bonding processes of the LED chips, respectively. Wafer level MEMS technology is utilized to form parallel wiring lines suspended and connected to various contact pads. Bonding wires connecting the LED chips are made into horizontally arranged extendable metal wiring lines which can be in a spring shape, and allowing for expanding and contracting of the distance between the connected LED chips. A tape is further provided to be bonded to the LED chips, and extended in size to enlarge distance between the LED chips to exceed the one or more prearranged distances.

公开(公告)号：US20230207515A1

公开(公告)日：2023-06-29

申请号：US18087538

申请日：2022-12-22

Applicant: Commissariat à l'Énergie Atomique et aux Énergies Alternatives

Inventor： Frank Fournel ,  Christophe Morales ,  Loïc Sanchez ,  Brigitte Montmayeul

IPC: H01L23/00

CPC classification number: H01L24/80 ,  H01L24/08 ,  H01L2224/08245 ,  H01L2224/80004 ,  H01L2224/80085 ,  H01L2224/80874 ,  H01L2224/80895 ,  H01L2224/80986 ,  H01L2924/37

Abstract: A method of preparation of a first surface of an electronic component, the first surface being intended to be bonded to another electronic component by a direct bonding and the first surface having previously been submitted to a surface treatment in an atmosphere including nitrogen, for example, a treatment in a nitrogen plasma or an ozone UV treatment, the preparation method including: placing into contact the first surface with an aqueous solution including at least 90% water, for a contacting duration longer than or equal to 30 minutes; and then drying the first surface.

公开(公告)号：US09865463B2

公开(公告)日：2018-01-09

申请号：US15193367

申请日：2016-06-27

Applicant: SII Semiconductor Corporation

Inventor： Hitomi Sakurai

IPC: H01L21/3205 ,  H01L21/027 ,  H01L21/28 ,  H01L29/66

CPC classification number: H01L21/0273 ,  H01L21/28123 ,  H01L21/32139 ,  H01L29/66575 ,  H01L2224/80874 ,  H01L2224/81874 ,  H01L2224/8188

Abstract: In a method of manufacturing a semiconductor device, a first photoresist layer is applied on a polycrystalline silicon layer formed on a semiconductor substrate. The first photoresist layer is then patterned and cured with UV rays. The polycrystalline silicon layer is etched, using the first photoresist layer as a mask, to form a gate electrode and a resistive film of the polycrystalline silicon layer. A second photoresist layer is applied on the cured first photoresist layer and patterned to form an opening portion exposing the first photoresist layer. Impurities are ion implanted through the opening portion in the polycrystalline silicon layer. The channeling of impurities implanted during the ion implantation is suppressed by the cured first photoresist layer.

公开(公告)号：US20160099393A1

公开(公告)日：2016-04-07

申请号：US14507862

申请日：2014-10-07

Applicant: Epistar Corporation ,  IMEC Taiwan Co.

Inventor： Guan Ru He ,  Jui-Hung Yeh ,  Kevin T. Y. Huang ,  Chih Chung Chen

IPC: H01L33/62 ,  H01L33/36 ,  H01L25/075 ,  H01L33/48

CPC classification number: H01L33/62 ,  H01L21/6835 ,  H01L21/6836 ,  H01L24/29 ,  H01L24/40 ,  H01L24/48 ,  H01L24/64 ,  H01L24/66 ,  H01L24/69 ,  H01L24/73 ,  H01L24/80 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L24/89 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0753 ,  H01L27/153 ,  H01L33/36 ,  H01L33/486 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68359 ,  H01L2221/68372 ,  H01L2221/68381 ,  H01L2224/29194 ,  H01L2224/40245 ,  H01L2224/48091 ,  H01L2224/48245 ,  H01L2224/64 ,  H01L2224/73251 ,  H01L2224/80006 ,  H01L2224/8085 ,  H01L2224/80862 ,  H01L2224/80874 ,  H01L2224/84439 ,  H01L2224/84444 ,  H01L2224/84447 ,  H01L2224/84455 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2224/89 ,  H01L2224/9222 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/12041 ,  H01L2933/0016 ,  H01L2933/0066 ,  H01L2221/68304 ,  H01L2224/45099 ,  H01L2224/32 ,  H01L2224/69 ,  H01L2224/83 ,  H01L2224/08 ,  H01L2224/80 ,  H01L2224/85 ,  H01L2224/84 ,  H01L2924/00012 ,  H01L2224/37099

Abstract: LED chip packaging assembly that facilitates an integrated method for mounting LED chips as a group to be pre-wired to be electrically connected to each other through a pattern of extendable metal wiring lines is provided. LED chips which are electrically connected to each other through extendable metal wiring lines, replace pick and place mounting and the wire bonding processes of the LED chips, respectively. Wafer level MEMS technology is utilized to form parallel wiring lines suspended and connected to various contact pads. Bonding wires connecting the LED chips are made into horizontally arranged extendable metal wiring lines which can be in a spring shape, and allowing for expanding and contracting of the distance between the connected LED chips. A tape is further provided to be bonded to the LED chips, and extended in size to enlarge distance between the LED chips to exceed the one or more prearranged distances.

Abstract translation: 提供了一种便于集成的LED芯片封装组件，用于通过可延伸金属布线的图案将预先布线的LED芯片安装成彼此电连接。 通过可延伸的金属布线电连接的LED芯片分别代替LED芯片的拾取和放置安装以及引线接合工艺。 晶圆级MEMS技术用于形成并联布线，并联连接到各种接触焊盘。 连接LED芯片的接合线被制成水平布置的可延伸的金属布线，其可以是弹簧形状，并且允许连接的LED芯片之间的距离的扩展和收缩。 进一步提供胶带以将其粘合到LED芯片，并且尺寸延伸以扩大LED芯片之间的距离，以超过一个或多个预定距离。