公开(公告)号：US07956806B2

公开(公告)日：2011-06-07

申请号：US12484604

申请日：2009-06-15

Applicant: Zhang Liu ,  Gregory A. Shreve

Inventor： Zhang Liu ,  Gregory A. Shreve

IPC: H01Q3/00

CPC classification number: H04B7/086 ,  G01S3/40

Abstract: Systems and methods are provided for orienting an antenna in a communications system on a mobile platform to orient a peak of the antenna pattern in a direction associated with a signal source. A signal from a signal source is received at the antenna. A signal strength is measured from the received signal. A signal strength and a misalignment of the antenna along at least one axis are predicted according to a previous estimate of the signal strength, a previous estimate of the misalignment of the antenna, an estimated change in the signal strength, and a known change in the antenna orientation. The predicted signal strength and misalignment of the antenna are updated according to the measured signal strength to provide an estimate of a current misalignment of the antenna. The orientation of the peak of the antenna pattern is adjusted according to the estimated current misalignment of the antenna.

Abstract translation: 提供了系统和方法，用于在移动平台上的通信系统中定向天线，以将天线图案的峰值定向在与信号源相关联的方向上。 在天线处接收来自信号源的信号。 从接收信号测量信号强度。 根据信号强度的先前估计，天线未对准的先前估计，信号强度的估计变化以及信号强度的已知变化来预测天线沿着至少一个轴的信号强度和未对准 天线方向。 根据测得的信号强度来更新天线的预测信号强度和未对准，以提供对天线的电流未对准的估计。 根据天线的估计的电流偏差来调整天线方向图的峰值的方位。

公开(公告)号：US20090108299A1

公开(公告)日：2009-04-30

申请号：US11976590

申请日：2007-10-25

Applicant: Ioulia Smorchkova ,  Carol Namba ,  Po-Hsin Liu ,  Robert Coffie ,  Roger Tsai

Inventor： Ioulia Smorchkova ,  Carol Namba ,  Po-Hsin Liu ,  Robert Coffie ,  Roger Tsai

IPC: H01L29/778 ,  H01L21/338

CPC classification number: H01L29/7786 ,  H01L29/2003 ,  H01L29/404 ,  H01L29/66462 ,  H01L29/7783

Abstract: A semiconductor device includes a T-gate disposed between drain and source regions and above a barrier layer to form a Schottky contact to the channel layer. A first inactive field mitigating plate is disposed above a portion of the T-gate and a second active field plate is disposed above the barrier layer and in a vicinity of the T-gate.

Abstract translation: 半导体器件包括设置在漏极和源极区域之间以及阻挡层上方的T栅极，以形成与沟道层的肖特基接触。 第一非活性场缓和板设置在T栅极的一部分上方，并且第二有源场板设置在阻挡层上方和T栅极附近。

公开(公告)号：US3874918A

公开(公告)日：1975-04-01

申请号：US44378174

申请日：1974-02-19

Applicant: TRW INC

Inventor： NECHTOW MARSHALL I ,  SANDERA JIRI

IPC: H01L29/864 ,  H01L21/78 ,  H01L23/31 ,  H01L23/485 ,  H01L29/00 ,  B44D1/18 ,  H01L3/00

CPC classification number: H01L23/485 ,  H01L21/78 ,  H01L23/3157 ,  H01L29/00 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A fabrication process and structure for semiconductor devices allowing a large number of devices to be made utilizing batch processing techniques without individual handling of the devices. The process includes forming a plurality of mesas on a semiconductor wafer, each of which contains a semiconductor junction, coating the wafer with a thick glass coating, etching tapered holes in the glass over the mesas, and plating a contact onto the mesa filling the tapered holes. Diodes made according to the process display low capacitance and inductance, high reliablility and high power dissipation characteristics.

Abstract translation: 一种用于半导体器件的制造工艺和结构，允许使用批处理技术制造大量器件，而无需单独处理器件。 该方法包括在半导体晶片上形成多个台面，每个台面均包含半导体结，用厚玻璃涂层涂覆晶片，在台面上蚀刻玻璃中的锥形孔，并将接触电镀在台面上， 孔。 根据工艺制造的二极管显示低电容和电感，高可靠性和高功耗特性。

公开(公告)号：US3697895A

公开(公告)日：1972-10-10

申请号：US3697895D

申请日：1970-08-03

Applicant: TRW INC

Inventor： BECK ALFRED B

IPC: H03H7/48 ,  H03H7/38 ,  H01P5/12

CPC classification number: H03H7/48

Abstract: Electrical power dividing or combining, and impedance transforming, binary tree circuits for an optimized output or input port isolation or an optimized VSWR across a predetermined frequency band, or a desired compromise between them, having cascaded tiers of multi-port hybrid circuits with each hybrid circuit having a bridging impedance connected across its arrayed ports. The circuits are derived from an even-mode synthesis of a prototype circuit having equal-ripple input reflection coefficient response across the predetermined frequency band, the bridging impedance values for the arrayed ports of each hybrid circuit being determined in accordance with the desired relationship between VSWR and port isolation by an even and oddmode analysis of each hybrid circuit.

Abstract translation: 用于优化的输出或输入端口隔离的电力分配或组合以及用于优化的输出端口隔离或优化的跨越预定频带的VSWR的二进制树电路或它们之间的期望的折中，具有每个混合电路的多端口混合电路的级联层 电路具有连接在其阵列端口上的桥接阻抗。 这些电路是从具有在预定频带上具有相等纹波输入反射系数响应的原型电路的偶模合成得出的，每个混合电路的阵列端口的桥接阻抗值根据VSWR 并通过每个混合电路的偶模式和奇模式分析来实现端口隔离。

公开(公告)号：US3676230A

公开(公告)日：1972-07-11

申请号：US3676230D

申请日：1971-02-16

Applicant: TRW INC

Inventor： RICE EDWARD J

IPC: H01L21/00 ,  H01L21/225 ,  H01L7/44

CPC classification number: H01L21/2255 ,  H01L21/00 ,  Y10S148/043 ,  Y10S148/051 ,  Y10S148/111 ,  Y10S148/143 ,  Y10S148/145

Abstract: A METHOD FOR FORMING SEMICONDUCTOR JUNCTIONS. A SEMICONDUCTOR MATERIAL OF A GIVEN CONDUCTIVITY IS PROVIDED, TWO SEQUENTIAL PASSIVATING LAYERS BEING DISPOSED ON THE SURFACE, THEREOF, THE PASSIVATING LAYERS BEING ADAPTED TO BE ETCHED BY MUTUALLY EXCLUSIVE ETCHING COMPOUNDS. A PORTION OF THE SEMICONDUCTOR SURFACE IS EXPOSED, THE PASSIVATING LAYER ADJACENT THE SURFACE OF THE SEMICONDUCTOR MATERIAL BEING UNDERCUT RELATIVE TO THE UPPER PASSIVATING LAYER. A DOPED OXIDE IS DISPOSED UPON THE SEMICONDUCTOR SURFACE INCLUDING THAT PORTION ADJACENT THE UNDERCUT PASSIVATING LAYER. THE DOPED OXIDE, IS ETCHED IN A MANNER LEAVING PORTIONS OF THE DOPED OXIDE IN INTIMATE CONTACT WITH THE SURFACE OF THE SEMICONDUCTOR MATEIAL SUBSTANTIALLY ADJACENT THE UNDERCUT PASSIVATING LAYER. THE DOPANT IS THEN DIFFUSED INTO THE SEMICONDUCTOR SURFACE FORMING APPROPRIATE SEMICONDUCTOR JUNCTIONS THEREIN.

公开(公告)号：US3626259A

公开(公告)日：1971-12-07

申请号：US3626259D

申请日：1970-07-15

Applicant: TRW INC

Inventor： GARBOUSHIAN VAHAN ,  RUZINSKY HERBERT

IPC: H01L23/047 ,  H01L23/42 ,  H01L23/488 ,  H01L23/66 ,  H01L5/00

CPC classification number: H01L24/49 ,  H01L23/047 ,  H01L23/42 ,  H01L23/66 ,  H01L24/45 ,  H01L24/48 ,  H01L2223/6644 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/49109 ,  H01L2224/49175 ,  H01L2224/4943 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A package for a high-frequency semiconductor device. A semiconductor wafer having interdigitated active regions formed therein is mounted upon a portion of a metallized thermally conducting ceramic member. A conducting member is mounted upon and insulated from a second portion of the metallized ceramic member via a second ceramic member. The active regions of the device are contacted by interlaced, stitch bonded contacts. The metallized thermal conducting ceramic member is mounted upon a metal header, the semiconductor device being encapsulated thereon.

公开(公告)号：US3246303A

公开(公告)日：1966-04-12

申请号：US13729561

申请日：1961-09-11

Applicant: THOMPSON RAMO WOOLDRIDGE INC

Inventor： AMDAHL LOWELL D ,  AMDAHL GENE M ,  ENGEL HOWARD L ,  SCHNEBERGER EDWARD J ,  BLANKENBAKER JOHN V

IPC: G06F9/22

CPC classification number: G06F9/223

公开(公告)号：US3239674A

公开(公告)日：1966-03-08

申请号：US632060

申请日：1960-02-02

Applicant: THOMPSON RAMO WOOLDRIDGE INC

Inventor： AROYAN GEORGE F

IPC: G01S3/787 ,  G01S3/789

CPC classification number: G01S3/787 ,  G01S3/789

公开(公告)号：US3203305A

公开(公告)日：1965-08-31

申请号：US8945361

申请日：1961-02-15

Applicant: THOMPSON RAMO WOOLDRIDGE INC

Inventor： FAIRBANKS AVARD F

IPC: G01S17/93

CPC classification number: G01S17/933

公开(公告)号：US3196407A

公开(公告)日：1965-07-20

申请号：US11009861

申请日：1961-05-15

Applicant: THOMPSON RAMO WOOLDRIDGE INC

Inventor： DAVIES PAUL M

IPC: G11C11/44 ,  G11C15/06

CPC classification number: G11C15/06 ,  G11C11/44 ,  Y10S505/835