Abstract:
A memory system includes a control device suitable for generating first command signals for a unit time and storing first count information corresponding to the number of times to generate the first command signals based on temperature information, in a training mode, and generating second command signals based on the first count information and second count information in a normal mode, the second count information corresponding to the number of times to generate the second command signals for the unit time, and a memory device suitable for performing an internal operation based on the first command signals and providing the control device with the temperature information when performing the internal operation, in the training mode, and performing an internal operation based on the second command signals in the normal mode.
Abstract:
A memory device includes a memory region, and a setting circuit suitable for changing setting information based on a temperature information signal so that the memory region operates according to a first condition at pseudo cryogenic temperature, and operates according to a second condition at room temperature.
Abstract:
The present disclosure generally relates to semiconductor structures and, more particularly, to intelligent through silicon via sharing in 3D-IC integrated structures and methods of manufacture. The structure includes: a plurality of stacked dies each containing at least one macro device; and a layer structure positioned between the plurality of stacked dies which comprises a control structured to route signals between the at least one macro device of a first stacked die and the at least one macro device of a second stacked die of the plurality of stacked dies.
Abstract:
A superconducting learning matrix in which the coupling cells at the matrix intersections include a write cryotron controlled by the row lines for activating the storage cells, and a coupling cryotron for coupling the column lines either to the row lines or word recognition lines for reading out of the cell. The storage cells are activated according to a geometric series. The coupling cryotrons may also be controlled by a blocking line, and additional switching cryotrons may be provided for insuring constant current in taught cells. In a further embodiment, a complementary matrix may also be provided.