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公开(公告)号：US20240364664A1
公开(公告)日：2024-10-31
申请号：US18639724
申请日：2024-04-18
申请人： NXP B.V.
IPC分类号： H04L9/40
CPC分类号： H04L63/0428
摘要： The present invention relates to device for compensating variations in run time of a word of a frame. The invention also relates to a method for the device.
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2.发明公开公开(公告)号：US20240356773A1
公开(公告)日：2024-10-24
申请号：US18638086
申请日：2024-04-17
申请人： NXP B.V.
CPC分类号： H04L12/40013 , G06F11/0745 , H04L2012/40215
摘要： The invention relates to a delay module for a CAN device. The delay module is configured to delay only a single signal change of an RXD signal, wherein the single signal change forms the end of an idle state. Use of the delay module allows a second RXD signal to be generated. The invention further relates to a CAN device comprising two CAN controllers. Each of the two CAN controllers may be provided with one of the two RXD signals. The CAN device may further be configured to detect possible errors based on the decoded bits of the RXD signals. As a result, the CAN device can communicate error-free with both distantly located further CAN devices and closely located further CAN devices, while ensuring a high data rate. The invention also relates to a method for the delay module.
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公开(公告)号：US20240356748A1
公开(公告)日：2024-10-24
申请号：US18135922
申请日：2023-04-18
申请人： NXP B.V.
发明人： Joost Roland Renes , Björn Fay
IPC分类号： H04L9/30
CPC分类号： H04L9/3093
摘要： System and method for masking secret polynomials for cryptography receives a secret polynomial function in a polynomial ring, which is masked with one or more masking polynomials in which at least some coefficients have a same value. An arithmetic operation is performed on coefficients of the masking polynomials with repeated coefficients to produce an output having integer values. A cryptographic operation is then performed with the output of the arithmetic operation.
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公开(公告)号：US20240356558A1
公开(公告)日：2024-10-24
申请号：US18611022
申请日：2024-03-20
申请人： NXP B.V.
CPC分类号： H03M1/12 , G11B20/00007
摘要： In accordance with a first aspect of the present disclosure, a communication device is provided, comprising: a front-end configured to receive an analog input signal, wherein the front-end comprises an analog-to-digital converter configured to convert the analog input signal into a digital signal; a digital signal processor configured to receive and process said digital signal; wherein the front-end further comprises a compressor operatively coupled to an input of the analog-to-digital converter, wherein said compressor is configured to apply a compressor function to the analog input signal before said analog input signal is provided to the analog-to-digital converter. In accordance with a second aspect of the present disclosure, a corresponding method of operating a communication device is conceived.
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公开(公告)号：US20240353888A1
公开(公告)日：2024-10-24
申请号：US18640347
申请日：2024-04-19
申请人： NXP B.V.
发明人： Andreas Lentz , David Paul Price
摘要： The present disclosure relates to a clock signal monitoring unit comprising first, second and third flip-flops, first and second XOR gates and a delay element being functionally interconnected in a specific way. The proposed clock signal monitoring unit can detect both a rising edge glitch and a falling edge glitch. In this way there is provided an area saving device, which does not require any trimming efforts, which can save a lot of space and time. Furthermore, the clock signal monitoring unit can have low electric power consumption because it uses as few as four clocked flip-flops implemented via Register Transfer Logic having an already tuned delay element. This makes it useful for designs that use both edges of the clock for correct operation.
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公开(公告)号：US12126366B2
公开(公告)日：2024-10-22
申请号：US17950486
申请日：2022-09-22
申请人： NXP B.V.
发明人： Dave Sebastiaan Kroekenstoel , Muhammad Kamran , Harry Neuteboom , Costantino Ligouras , Sergio Andrés Rueda Gómez
摘要： Embodiments of multi-mode sigma-delta analog-to-digital converter (ADC) circuits and a microphone circuit are disclosed. In an embodiment, a multi-mode sigma-delta ADC circuit includes a pair of operational transconductance amplifiers (OTAs), a filter connected to the pair of OTAs, a quantizer connected to the filter, a differential digital-to-analog converter (DAC) connected to the quantizer, and a controller configured to switch the multi-mode sigma-delta ADC circuit between a single-ended operational mode, a pseudo differential operational mode, and a full differential operational mode to improve common mode rejection (CMR) performance by controlling the pair of OTAs. An output of a microphone and a differential output of the differential DAC are inputted into input terminals of the pair of OTAs.
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公开(公告)号：US12126351B2
公开(公告)日：2024-10-22
申请号：US18061601
申请日：2022-12-05
申请人： NXP B.V.
CPC分类号： H03M1/0621 , H03M1/1047 , H03M1/181 , H03M1/1009 , H03M1/68
摘要： Aspects of the disclosure are directed to compensating for errors in in an analog-to-digital converter circuit (ADC). As may be implemented in accordance with one or more embodiments, an apparatus and/or method involves an ADC that converts an analog signal into a digital signal using an output from a digital-to-analog converter circuit (DAC). A compensation circuit generates a compensation output by, for respective signal portions provided to the DAC, generating a feedback signal based on an incompatibility between the conversion of the signal portions into an analog signal and the value of the signal portions provided to the DAC. A compensation output is generated based on the signal input to the DAC with a gain applied thereto, based on the feedback signal. Hereby, the digital inputs provided to the DACs are non-randomized.
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公开(公告)号：US20240346262A1
公开(公告)日：2024-10-17
申请号：US18301315
申请日：2023-04-17
申请人： NXP B.V.
CPC分类号： G06K7/10237 , G06K7/0008
摘要： A method and wireless device with a counterpart presence detector is provided. The detector includes only memory and logic circuits to detect a change in a ringing artifact from the presence of a RF device. The memory stores template signals and threshold values. The template signals may be generated using a metal object positioned various distances from the RF device. The ringing artifact, also called an RF-off signal, is sampled. A difference between subsequent ringing artifact samples is taken to produce a ringing artifact difference. Also, a difference between subsequent samples of a template signal is taken to produce a template difference. A Euclidean distance between the ringing artifact difference and the template difference is determined. The distance is compared to a threshold value. A presence of another RF device within the RF field of the RF device is detected if the distance compares favorably to the threshold value.
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公开(公告)号：US20240345238A1
公开(公告)日：2024-10-17
申请号：US18336081
申请日：2023-06-16
申请人： NXP B.V.
CPC分类号： G01S13/42 , G01S7/354 , G01S7/356 , G01S2013/0245 , G01S13/931
摘要： A system includes a processor and a non-transitory computer-readable medium storing machine instructions executable by the processor. The processor obtains an input radar signal, determines coefficients for an auto-regressive model based on the input signal and an order size, and extrapolates the input signal based on the model and the determined coefficients to obtain an extrapolated signal. In some implementations, the input signal comprises a number N of samples, and the order size is approximately half of N. The coefficients are determined based on the N samples, and the processor extrapolates a right-side signal based on the model, the determined coefficients, and a second half of the N samples; extrapolates a left-side signal based on the model, complex conjugates of the determined coefficients, and a first half of the N samples; and generates the extrapolated signal based on the left-side signal, the input signal, and the right-side signal.
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公开(公告)号：US20240340000A1
公开(公告)日：2024-10-10
申请号：US18296249
申请日：2023-04-05
申请人： NXP B.V.
发明人： Jang Hyuck Lee , Jin Hui Lee
IPC分类号： H03K17/16
CPC分类号： H03K17/16
摘要： A current leakage limit circuit connected to a circuit with current leakage and a leakage compensation circuit includes a first current mirror with a first transistor and a second transistor and a current source connected to the first transistor. The second transistor is connected between the circuit and the leakage compensation circuit and limits a compensation current flowing between the circuit and the leakage compensation circuit. The current flowing from the current source through the first transistor limits the current flowing through the second transistor.
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