AN APPARATUS INCLUDING A TRANSCEIVER
    1.
    发明公开

    公开(公告)号:US20230291664A1

    公开(公告)日:2023-09-14

    申请号:US18180552

    申请日:2023-03-08

    Applicant: NXP B.V.

    CPC classification number: H04L43/028 H04L43/18

    Abstract: An apparatus comprising: an input for receiving a stream of data transmission units; a filter configured to identify data transmission units of a first predetermined type based on predefined identifying information and generate a second stream of data transmission units comprising said first stream with at least one data transmission unit filtered out; a protocol module configured to identify, based on second predefined identifying information, and in said second stream at least one data transmission unit of a second predetermined type and add protocol information thereto; and wherein the filter being configured to filter out said at least one data transmission unit provides time in said second stream for the addition of the protocol information; and wherein the apparatus includes a transceiver configured to output signals representative of said data transmission units of the second stream with said protocol information added to a transmission medium.

    AN APPARATUS INCLUDING A TRANSCEIVER
    4.
    发明公开

    公开(公告)号:US20230291748A1

    公开(公告)日:2023-09-14

    申请号:US18179775

    申请日:2023-03-07

    Applicant: NXP B.V.

    CPC classification number: H04L63/123 H04L63/162 H04L69/22

    Abstract: An apparatus comprising: a receive-input for coupling to a transmission medium; a transceiver configured to receive signals representative of one or more data transmission units from the receive-input and output said data transmission units a protocol module configured to process at least a subset of the one or more data transmission units output from the transceiver according to a protocol, said processing including at least removing one or more fields of information from said subset of data transmission units associated with said protocol; and wherein the apparatus is configured to add at least one field to the subset of data transmission units processed by said protocol module, the at least one field comprising protocol information derived from said processing by the protocol module and provide said data transmission units with the at least one field added to a receive-output of the apparatus.

    RECONCILIATION MODULE AND ASSOCIATED METHOD FOR COLLISION AVOIDANCE

    公开(公告)号:US20250125992A1

    公开(公告)日:2025-04-17

    申请号:US18828285

    申请日:2024-09-09

    Applicant: NXP B.V.

    Abstract: A reconciliation module for a node of a multidrop bus network, the node comprising a MAC module and a PHY module, the reconciliation module comprising circuitry configured to: receive data from the MAC module for transmission on the multidrop bus network via the PHY module at a transmit opportunity of the node; assert a sense signal on receipt of the data from the MAC module; and delay de-assertion of the sense signal after transmission of the data to facilitate the transmission of further data at the next transmit opportunity of the node.

    RECONCILIATION MODULE AND ASSOCIATED METHOD FOR COLLISION AVOIDANCE

    公开(公告)号:US20250125991A1

    公开(公告)日:2025-04-17

    申请号:US18827472

    申请日:2024-09-06

    Applicant: NXP B.V.

    Abstract: A reconciliation module for a node of a multidrop bus network, the reconciliation module comprising circuitry configured to: receive data sent from a MAC module of the node as part of a first attempt by the MAC module to transmit the data; assert a collision signal by default on receipt of the data from the MAC module to stop the MAC module from continuing to send the data; and control a sense signal to cause the MAC module to resend the data as part of a second transmission attempt such that the data may be transmitted on the multidrop bus network via a PHY module of the node at an upcoming transmit opportunity.

    RECONCILIATION MODULE AND ASSOCIATED METHOD FOR COLLISION AVOIDANCE

    公开(公告)号:US20250125993A1

    公开(公告)日:2025-04-17

    申请号:US18828471

    申请日:2024-09-09

    Applicant: NXP B.V.

    Abstract: A reconciliation module for a node of a multidrop bus network, the node comprising a MAC module and a PHY module, the reconciliation module comprising circuitry configured to: assert a sense signal until the beginning of each transmit opportunity of the node; de-assert the sense signal at that moment to cause the MAC module to send available data to the reconciliation module to start transmission of the data on the multidrop bus network via the PHY module at the respective transmit opportunity; and re-assert the sense signal on receipt of the data from the MAC module or time-out of the respective transmit opportunity.

    APPARATUS INCLUDING A TRANSCEIVER
    9.
    发明公开

    公开(公告)号:US20230262028A1

    公开(公告)日:2023-08-17

    申请号:US18166556

    申请日:2023-02-09

    Applicant: NXP B.V.

    CPC classification number: H04L63/0236 H04B1/16 H04L63/04 H04L63/123

    Abstract: An apparatus comprising: an input for receiving a stream comprising a plurality of data transmission units; a filter configured to identify, in the stream, at least one data transmission unit having control data of a predetermined type and remove said control data to generate a second stream; a protocol module configured to receive said second stream and identify, in the second stream, at least one data transmission unit of a predetermined type and add protocol information to the at least one data transmission unit; and wherein the removal of said control data provides time in said second stream for the addition of the protocol information; and wherein the apparatus includes a transceiver configured to output signals representative of said data transmission units of the second stream with said protocol information added to a transmission medium.

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