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    ENHANCING SCHOTTKY BREAKDOWN VOLTAGE (BV) WITHOUT AFFECTING AN INTEGRATED MOSFET-SCHOTTKY DEVICE LAYOUT
    7.
    发明申请
    ENHANCING SCHOTTKY BREAKDOWN VOLTAGE (BV) WITHOUT AFFECTING AN INTEGRATED MOSFET-SCHOTTKY DEVICE LAYOUT 有权
    在不影响集成MOSFET肖特基器件布局的情况下增强肖特基势垒（BV）

    公开(公告)号：US20140374823A1

    公开(公告)日：2014-12-25

    申请号：US13925776

    申请日：2013-06-24

    申请人： Anup Bhalla ,  Xiaobin Wang ,  Moses Ho

    发明人： Anup Bhalla ,  Xiaobin Wang ,  Moses Ho

    IPC分类号： H01L29/78

    CPC分类号： H01L29/7803 ,  H01L27/0727 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/41766 ,  H01L29/66734 ,  H01L29/7806 ,  H01L29/7813 ,  H01L29/872

    摘要： This invention discloses a semiconductor power device that includes an active cell area having a plurality of power transistor cells. Each of said power transistor cells has a planar Schottky diode that includes a Schottky junction barrier metal covering areas above gaps between separated body regions between two adjacent power transistor cells. The separated body regions further provide a function of adjusting a leakage current of said Schottky diode in each of said power transistor cells. Each of the planar Schottky diodes further includes a Shannon implant region disposed in a gap between the separated body regions of two adjacent power transistor cells for further adjusting a leakage current of said Schottky diode. Each of the power transistor cells further includes heavy body doped regions in the separated body regions next to source regions surrounding said Schottky diode forming a junction barrier Schottky (JBS) pocket region.

    摘要翻译： 本发明公开了一种包括具有多个功率晶体管单元的有源单元区域的半导体功率器件。 每个所述功率晶体管单元具有平面肖特基二极管，其包括覆盖两个相邻功率晶体管单元之间的分离体区域之间的间隙上方的区域的肖特基结阻挡金属。 分离体区域还提供调节每个所述功率晶体管单元中的所述肖特基二极管的漏电流的功能。 每个平面肖特基二极管还包括设置在两个相邻功率晶体管单元的分离的体区之间的间隙中的香农注入区，用于进一步调整所述肖特基二极管的漏电流。 每个功率晶体管单元进一步包括分离体区域中的重体掺杂区域，其邻近形成结屏障肖特基（JBS）口袋区域的围绕所述肖特基二极管的源极区域。

    Dual gate oxide trench MOSFET with channel stop trench
    8.
    发明授权
    Dual gate oxide trench MOSFET with channel stop trench 有权
    双栅极氧化沟槽MOSFET，具有通道停止沟槽

    公开(公告)号：US08907416B2

    公开(公告)日：2014-12-09

    申请号：US13780579

    申请日：2013-02-28

    申请人： Sung-Shan Tai ,  Sik Lui ,  Xiaobin Wang

    发明人： Sung-Shan Tai ,  Sik Lui ,  Xiaobin Wang

    IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L29/40 ,  H01L29/06 ,  H01L29/08 ,  H01L29/417 ,  H01L29/423 ,  H01L29/45

    CPC分类号： H01L29/7813 ,  H01L29/0638 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/456 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7811

    摘要： A semiconductor device and fabrication methods are disclosed. The device includes a plurality of gate electrodes formed in trenches located in an active region of a semiconductor substrate. A first gate runner is formed in the substrate and electrically connected to the gate electrodes, wherein the first gate runner surrounds the active region. A second gate runner is connected to the first gate runner and located between the active region and a termination region. A termination structure surrounds the first and second gate runners and the active region. The termination structure includes a conductive material in an insulator-lined trench in the substrate, wherein the termination structure is electrically shorted to a source or body layer of the substrate thereby forming a channel stop for the device.

    摘要翻译： 公开了半导体器件和制造方法。 该器件包括形成在位于半导体衬底的有源区中的沟槽中的多个栅电极。 第一栅极流道形成在基板中并电连接到栅电极，其中第一栅极流道围绕有源区。 第二浇口浇道连接到第一浇口浇道并且位于活性区域和终止区域之间。 终端结构围绕第一和第二栅极流道和有源区域。 端接结构包括在衬底中的绝缘体衬里的沟槽中的导电材料，其中端接结构电气短路到衬底的源极或体层，从而形成用于器件的通道停止。

    MOSFET with improved performance through induced net charge region in thick bottom insulator
    9.
    发明授权
    MOSFET with improved performance through induced net charge region in thick bottom insulator 有权
    MOSFET通过在厚底部绝缘体中的感应净电荷区域具有改进的性能

    公开(公告)号：US08802530B2

    公开(公告)日：2014-08-12

    申请号：US13490138

    申请日：2012-06-06

    申请人： Xiaobin Wang ,  Anup Bhalla ,  Daniel Ng

    发明人： Xiaobin Wang ,  Anup Bhalla ,  Daniel Ng

    IPC分类号： H01L21/336 ,  H01L29/78 ,  H01L21/42

    CPC分类号： H01L29/7813 ,  H01L21/42 ,  H01L29/408 ,  H01L29/41766 ,  H01L29/42368 ,  H01L29/66734

    摘要： A semiconductor power device includes a thick bottom insulator formed in a lower portion of a trench in a semiconductor epitaxial region. An electrically conductive gate electrode is formed in the trench above the bottom insulator. The gate electrode is electrically insulated from the epitaxial region by the bottom insulator and a gate insulator. Charge is deliberately induced in the thick bottom insulator proximate an interface between the bottom insulator and the epitaxial semiconductor region. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

    摘要翻译： 半导体功率器件包括形成在半导体外延区域中的沟槽的下部的厚的底部绝缘体。 在底部绝缘体上方的沟槽中形成导电栅电极。 栅极电极通过底部绝缘体和栅极绝缘体与外延区域电绝缘。 在底部绝缘体和外延半导体区域之间的界面附近的厚底层绝缘体中有意地引起电荷。 要强调的是，该摘要被提供以符合要求抽象的规则，允许搜索者或其他读者快速确定技术公开内容的主题。 提交它的理解是，它不会用于解释或限制权利要求的范围或含义。

    Magnetic tunnel junction with free layer having exchange coupled magnetic elements
    10.
    发明授权
    Magnetic tunnel junction with free layer having exchange coupled magnetic elements 有权
    具有交换耦合磁性元件的自由层的磁性隧道结

    公开(公告)号：US08742518B2

    公开(公告)日：2014-06-03

    申请号：US13077948

    申请日：2011-03-31

    申请人： Xiaobin Wang ,  Kaizhong Gao

    发明人： Xiaobin Wang ,  Kaizhong Gao

    IPC分类号： H01L43/08

    CPC分类号： G11C11/161 ,  G11C11/1675 ,  G11C11/5607

    摘要： A magnetic tunnel junction device includes a reference magnetic layer and a magnetic free layer including first and second magnetic elements that are magnetically exchange coupled. The magnetic exchange coupling between the first and second magnetic elements is configured to achieve a switching current distribution less than about 200% and a long term thermal stability criterion of greater than about 60 kBT.

    摘要翻译： 磁性隧道结装置包括参考磁性层和包括磁交换耦合的第一和第二磁性元件的无磁性层。 第一和第二磁性元件之间的磁交换耦合被配置为实现小于约200％的开关电流分布和大于约60kBT的长期热稳定性标准。