公开(公告)号：US20150084197A1

公开(公告)日：2015-03-26

申请号：US14561157

申请日：2014-12-04

申请人： United Test and Assembly Center Ltd.

发明人： Chuen Khiang WANG

IPC分类号： H01L23/538 ,  H05K1/11 ,  H05K1/09 ,  H01L23/28

CPC分类号： H01L23/5384 ,  H01L21/4832 ,  H01L21/56 ,  H01L21/568 ,  H01L23/28 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49866 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2224/73265 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/09 ,  H05K1/115 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： Package substrate, semiconductor packages and methods for forming a semiconductor package are presented. The package substrate includes a base substrate having first and second major surfaces and a plurality of via contacts extending through the first to the second major surfaces of the base substrate. A first conductive layer having a plurality of openings is disposed over the first surface of the base substrate and via contacts. The openings are configured to match conductive trace layout of the package substrate. Conductive traces are disposed over the first conductive layer. The conductive traces are directly coupled to the via contacts through some of the openings of the first conductive layer.

摘要翻译： 提供封装衬底，半导体封装以及用于形成半导体封装的方法。 封装衬底包括具有第一和第二主表面的基底衬底和延伸穿过基底衬底的第一至第二主表面的多个通孔触头。 具有多个开口的第一导电层设置在基底基板的第一表面上并经由触点。 开口被配置成匹配封装衬底的导电迹线布局。 导电迹线设置在第一导电层上。 导电迹线通过第一导电层的一些开口直接耦合到通孔触点。

公开(公告)号：US20140264835A1

公开(公告)日：2014-09-18

申请号：US13831964

申请日：2013-03-15

申请人： UNITED TEST AND ASSEMBLY CENTER LTD.

发明人： Chuen Khiang WANG

IPC分类号： H01L23/498 ,  H01L21/768 ,  H05K1/02

CPC分类号： H01L23/5384 ,  H01L21/4832 ,  H01L21/56 ,  H01L21/568 ,  H01L23/28 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49866 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2224/73265 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/09 ,  H05K1/115 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： Package substrate, semiconductor packages and methods for forming a semiconductor package are presented. The package substrate includes a base substrate having first and second major surfaces and a plurality of via contacts extending through the first to the second major surfaces of the base substrate. A first conductive layer having a plurality of openings is disposed over the first surface of the base substrate and via contacts. The openings are configured to match conductive trace layout of the package substrate. Conductive traces are disposed over the first conductive layer. The conductive traces are directly coupled to the via contacts through some of the openings of the first conductive layer.

摘要翻译： 提供封装衬底，半导体封装以及用于形成半导体封装的方法。 封装衬底包括具有第一和第二主表面的基底衬底和延伸穿过基底衬底的第一至第二主表面的多个通孔触头。 具有多个开口的第一导电层设置在基底基板的第一表面上并经由触点。 开口被配置成匹配封装衬底的导电迹线布局。 导电迹线设置在第一导电层上。 导电迹线通过第一导电层的一些开口直接耦合到通孔触点。

公开(公告)号：US20140227832A1

公开(公告)日：2014-08-14

申请号：US14257017

申请日：2014-04-21

申请人： United Test and Assembly Center Ltd.

发明人： Chuen Khiang WANG ,  Nathapong SUTHIWONGSUNTHORN ,  Kriangsak SAE LE ,  Antonio Jr B DIMAANO ,  Catherine Bee Liang NG ,  Richard Te GAN ,  Kian Teng ENG

IPC分类号： H01L21/48 ,  H01L21/56

CPC分类号： H01L23/49861 ,  H01L21/2885 ,  H01L21/4825 ,  H01L21/4828 ,  H01L21/4832 ,  H01L21/4839 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/56 ,  H01L21/561 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/36 ,  H01L23/481 ,  H01L23/49503 ,  H01L23/4952 ,  H01L23/49534 ,  H01L23/49537 ,  H01L23/49541 ,  H01L23/49575 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/9211 ,  H01L2224/92125 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06558 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A device is disclosed. The device includes a carrier substrate having first and second major surfaces. The first surface includes a die region and contact pads and the second surface includes package contacts. The carrier substrate includes a patterned lead frame which defines a line level with conductive traces and a via level with via contacts. The patterned lead frame provides interconnections between the contact pads and package contacts. The carrier substrate further includes a dielectric layer isolating the conductive traces and via contacts. The device includes a die mounted on the die region of the first surface.

摘要翻译： 公开了一种设备。 该装置包括具有第一和第二主表面的载体衬底。 第一表面包括管芯区域和接触焊盘，第二表面包括封装接触。 载体衬底包括图案化引线框架，其将导电迹线和具有通孔触点的通孔级限定在线路电平。 图案化引线框架提供接触焊盘和封装触点之间的互连。 载体衬底还包括隔离导电迹线和通孔触点的电介质层。 该装置包括安装在第一表面的管芯区域上的管芯。