公开(公告)号：US20200343357A1

公开(公告)日：2020-10-29

申请号：US16923867

申请日：2020-07-08

申请人： Taiwan Semiconductor Manufacturing Company. Ltd.

发明人： Po-Chi Wu ,  Chia-Wei Chang ,  Jung-Jui Li ,  Ya-Lan Chang ,  Yi-Cheng Chao

IPC分类号： H01L29/49 ,  H01L21/02 ,  H01L21/3213 ,  H01L29/66 ,  H01L29/78 ,  H01L21/28 ,  H01L21/321

摘要： A method for fabricating a semiconductor component includes forming an interlayer dielectric (ILD) layer on a substrate, forming a trench in the interlayer dielectric layer, forming a metal gate in the trench, removing a portion of the metal gate protruding from the ILD layer, reacting a reducing gas with the metal gate, and removing a top portion of the metal gate.

公开(公告)号：US20160351692A1

公开(公告)日：2016-12-01

申请号：US15233319

申请日：2016-08-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Tai-Chun Huang ,  Chih-Tang Peng ,  Chia-Wei Chang ,  Ming-Hua Yu ,  Hao-Ming Lien ,  Chao-Cheng Chen ,  Tze-Liang Lee

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L27/088 ,  H01L21/306 ,  H01L21/308 ,  H01L21/84 ,  H01L29/06

CPC分类号： H01L29/66795 ,  H01L21/30604 ,  H01L21/308 ,  H01L21/76289 ,  H01L21/764 ,  H01L21/845 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/42392 ,  H01L29/785 ,  H01L29/7856

摘要： An integrated circuit device includes a semiconductor substrate, and a semiconductor strip extending into the semiconductor substrate. A first and a second dielectric region are on opposite sides of, and in contact with, the semiconductor strip. Each of the first dielectric region and the second dielectric region includes a first portion level with the semiconductor strip, and a second portion lower than the semiconductor strip. The second portion further includes a portion overlapped by the semiconductor strip.

摘要翻译： 集成电路器件包括半导体衬底和延伸到半导体衬底中的半导体条。 第一和第二电介质区域位于半导体条的相对侧并与其接触。 第一电介质区域和第二电介质区域中的每一个包括具有半导体条的第一部分电平和低于半导体条的第二部分。 第二部分还包括与半导体条重叠的部分。

公开(公告)号：US20160027903A1

公开(公告)日：2016-01-28

申请号：US14876398

申请日：2015-10-06

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chia-Wei Chang ,  Ryan Chia-Jen Chen ,  Srisuda Thitinun

IPC分类号： H01L29/66 ,  H01L21/308 ,  H01L21/311 ,  H01L21/3105 ,  H01L21/02 ,  H01L21/306 ,  H01L21/762

CPC分类号： H01L21/823431 ,  H01L21/0206 ,  H01L21/30604 ,  H01L21/3083 ,  H01L21/31051 ,  H01L21/31111 ,  H01L21/76224 ,  H01L29/6653 ,  H01L29/66795 ,  H01L29/66818 ,  H01L29/785 ,  H01L29/7851 ,  H01L29/7853 ,  H01L29/7854

摘要： A method includes etching a semiconductor substrate to form a semiconductor strip and trenches on opposite sidewalls of the semiconductor strip. A spacer is formed on a sidewall of the semiconductor strip which is used as an etching mask to extend the trenches down into the semiconductor substrate. A dielectric material is filled into the trenches and then planarized to form insulation regions in the trenches. The insulation regions are recessed. After the recessing, top surfaces of the insulation regions are lower than a top surface of the semiconductor strip and a gate structure may be formed thereon.

摘要翻译： 一种方法包括蚀刻半导体衬底以形成半导体条和在该半导体条的相对的侧壁上的沟槽。 间隔物形成在半导体条的侧壁上，该侧壁用作蚀刻掩模以将沟槽向下延伸到半导体衬底中。 将介电材料填充到沟槽中，然后平坦化以在沟槽中形成绝缘区域。 绝缘区域是凹进的。 在凹陷之后，绝缘区域的顶表面低于半导体条的顶表面，并且可以在其上形成栅极结构。

公开(公告)号：US10269581B2

公开(公告)日：2019-04-23

申请号：US15722405

申请日：2017-10-02

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Tzu-Yen Hsieh ,  Ming-Ching Chang ,  Chia-Wei Chang ,  Chao-Cheng Chen ,  Chun-Hung Lee ,  Dai-Lin Wu

IPC分类号： H01L21/3215 ,  H01L21/3213 ,  H01L21/266 ,  H01L21/033 ,  H01L21/28 ,  H01L21/265

摘要： A method of making a semiconductor structure, the method including forming a conductive layer over a substrate. The method further includes forming a first imaging layer over the conductive layer, where the first imaging layer comprises a plurality of layers. The method further includes forming openings in the first imaging layer to expose a first set of areas of the conductive layer. The method further includes implanting ions into each area of the first set of area. The method further includes forming a second imaging layer over the conductive layer. The method further includes forming openings in the second imaging layer to expose a second set of areas of the conductive layer, wherein the second set of areas is different from the first set of areas. The method further includes implanting ions into the each area of the second set of areas.

公开(公告)号：US09779963B2

公开(公告)日：2017-10-03

申请号：US14813189

申请日：2015-07-30

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Tzu-Yen Hsieh ,  Ming-Ching Chang ,  Chia-Wei Chang ,  Chao-Cheng Chen ,  Chun-Hung Lee ,  Dai-Lin Wu

IPC分类号： H01L21/266 ,  H01L21/3215 ,  H01L21/28 ,  H01L21/3213 ,  H01L21/033 ,  H01L21/265

CPC分类号： H01L21/3215 ,  H01L21/0338 ,  H01L21/26506 ,  H01L21/266 ,  H01L21/28026 ,  H01L21/28035 ,  H01L21/28123 ,  H01L21/32134 ,  H01L21/32139

摘要： A method of making a semiconductor structure, the method including forming a conductive layer over a substrate. The method further includes forming a first imaging layer over the conductive layer, where the first imaging layer comprises a plurality of layers. The method further includes forming openings in the first imaging layer to expose a first set of areas of the conductive layer. The method further includes implanting ions into each area of the first set of area. The method further includes forming a second imaging layer over the conductive layer. The method further includes forming openings in the second imaging layer to expose a second set of areas of the conductive layer, wherein the second set of areas is different from the first set of areas. The method further includes implanting ions into the each area of the second set of areas.

公开(公告)号：US20140264491A1

公开(公告)日：2014-09-18

申请号：US13866841

申请日：2013-04-19

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Tai-Chun Huang ,  Chih-Tang Peng ,  Chia-Wei Chang ,  Ming-Hua Yu ,  Hao-Ming Lien ,  Chao-Cheng Chen ,  Tze-Liang Lee

IPC分类号： H01L29/66 ,  H01L29/78

CPC分类号： H01L29/66795 ,  H01L21/30604 ,  H01L21/308 ,  H01L21/76289 ,  H01L21/764 ,  H01L21/845 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/42392 ,  H01L29/785 ,  H01L29/7856

摘要： An integrated circuit device includes a semiconductor substrate, and a semiconductor strip extending into the semiconductor substrate. A first and a second dielectric region are on opposite sides of, and in contact with, the semiconductor strip. Each of the first dielectric region and the second dielectric region includes a first portion level with the semiconductor strip, and a second portion lower than the semiconductor strip. The second portion further includes a portion overlapped by the semiconductor strip.

摘要翻译： 集成电路器件包括半导体衬底和延伸到半导体衬底中的半导体条。 第一和第二电介质区域位于半导体条的相对侧并与其接触。 第一电介质区域和第二电介质区域中的每一个包括具有半导体条的第一部分电平和低于半导体条的第二部分。 第二部分还包括与半导体条重叠的部分。

公开(公告)号：US12068394B2

公开(公告)日：2024-08-20

申请号：US17306120

申请日：2021-05-03

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Chia-Wei Chang ,  Chiung Wen Hsu ,  Yu-Ting Weng

IPC分类号： H01L29/78 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/311 ,  H01L21/762 ,  H01L29/66

CPC分类号： H01L29/66795 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/3085 ,  H01L21/31116 ,  H01L21/76232 ,  H01L29/785 ,  H01L29/7851 ,  H01L29/7853

摘要： A semiconductor device includes a substrate, a fin structure protruding from the substrate, a gate insulating layer covering a channel region formed of the fin structure, a gate electrode layer covering the gate insulating layer, and isolation layers disposed on opposite sides of the fin structure. The fin structure includes a bottom portion, a neck portion, and a top portion sequentially disposed on the substrate. A width of the neck portion is less than a width of the bottom portion and a width of a portion of the top portion.

公开(公告)号：US12068300B2

公开(公告)日：2024-08-20

申请号：US17680523

申请日：2022-02-25

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chia-Wei Chang ,  Ju-Min Chen ,  Jyun-Lin Wu ,  Yao-Chun Chuang

IPC分类号： H01L25/18 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H01L25/00

CPC分类号： H01L25/18 ,  H01L23/3157 ,  H01L23/49816 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/562 ,  H01L25/50

摘要： A chip-on-wafer-on-substrate (CoWoS) semiconductor assembly is formed which includes a chip-on-wafer (CoW) sub-assembly of integrated circuit (IC) dies mounted on an interposer, which is in turn mounted on a package substrate with a top metallization stack and a bottom metallization stack using bonding bumps connecting the backside of the interposer and the front side of the package substrate. The bonding bumps provide electrical connections between the ends of through-vias exposed at the backside of the interposer and the top metallization stack of the package substrate. The likelihood of certain failure mechanisms that can adversely affect CoWoS yield are reduced or eliminated by ensuring a total metal thickness of the top metallization stack is greater than a total metal thickness of the bottom metallization stack, but not so much greater as to induce cracking of the underfill material during curing thereof.

公开(公告)号：US20180130896A1

公开(公告)日：2018-05-10

申请号：US15864575

申请日：2018-01-08

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Tai-Chun Huang ,  Chih-Tang Peng ,  Chia-Wei Chang ,  Ming-Hua Yu ,  Hao-Ming Lien ,  Chao-Cheng Chen ,  Tze-Liang Lee

IPC分类号： H01L29/66 ,  H01L27/088 ,  H01L21/308 ,  H01L29/78 ,  H01L29/06 ,  H01L21/306 ,  H01L21/84 ,  H01L21/764 ,  H01L21/762 ,  H01L29/423

CPC分类号： H01L29/66795 ,  H01L21/30604 ,  H01L21/308 ,  H01L21/76289 ,  H01L21/764 ,  H01L21/845 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/42392 ,  H01L29/785 ,  H01L29/7856

摘要： An integrated circuit device includes a semiconductor substrate, and a semiconductor strip extending into the semiconductor substrate. A first and a second dielectric region are on opposite sides of, and in contact with, the semiconductor strip. Each of the first dielectric region and the second dielectric region includes a first portion level with the semiconductor strip, and a second portion lower than the semiconductor strip. The second portion further includes a portion overlapped by the semiconductor strip.

公开(公告)号：US09698055B2

公开(公告)日：2017-07-04

申请号：US14876398

申请日：2015-10-06

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chia-Wei Chang ,  Ryan Chia-Jen Chen ,  Srisuda Thitinun

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/66 ,  H01L21/308 ,  H01L21/02 ,  H01L21/306 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/762

CPC分类号： H01L21/823431 ,  H01L21/0206 ,  H01L21/30604 ,  H01L21/3083 ,  H01L21/31051 ,  H01L21/31111 ,  H01L21/76224 ,  H01L29/6653 ,  H01L29/66795 ,  H01L29/66818 ,  H01L29/785 ,  H01L29/7851 ,  H01L29/7853 ,  H01L29/7854

摘要： A method includes etching a semiconductor substrate to form a semiconductor strip and trenches on opposite sidewalls of the semiconductor strip. A spacer is formed on a sidewall of the semiconductor strip which is used as an etching mask to extend the trenches down into the semiconductor substrate. A dielectric material is filled into the trenches and then planarized to form insulation regions in the trenches. The insulation regions are recessed. After the recessing, top surfaces of the insulation regions are lower than a top surface of the semiconductor strip and a gate structure may be formed thereon.