公开(公告)号：US20230378123A1

公开(公告)日：2023-11-23

申请号：US17749200

申请日：2022-05-20

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Hui-Min Huang ,  Kai Jun Zhan ,  Yi Chen Wu ,  Wei-Hung Lin ,  Ming-Da Cheng

IPC分类号： H01L23/00 ,  H01J37/32

CPC分类号： H01L24/81 ,  H01L24/75 ,  H01J37/32825 ,  H01J37/3244 ,  H01L24/16 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/75302 ,  H01L2224/81895 ,  H01L2224/81204 ,  H01L2224/81092 ,  H01L2224/81097

摘要： A disclosed system is configured to bond a chip to a substrate and includes a chip processing subsystem that is configured to receive the chip and to expose the chip to a first plasma, and a substrate processing subsystem that is configured to receive the substrate and to expose the substrate to a second plasma. The system further includes a bonding subsystem that is configured to align the chip with the substrate, to force the chip and the substrate into direct mechanical contact with one another by application of a compressive force, and to apply heat to at least one of the chip or the substrate. Application of the compressive force and the heat thereby bonds the chip to the substrate. The first and second plasmas may include H2/N2, H2/Ar, H2/He, NH3/N2, NH3/Ar, or NH3/He and the chip and substrate may be maintained in a low oxygen environment.

公开(公告)号：US11887955B2

公开(公告)日：2024-01-30

申请号：US17412551

申请日：2021-08-26

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Hui-Min Huang ,  Ming-Da Cheng ,  Chang-Jung Hsueh ,  Wei-Hung Lin ,  Kai Jun Zhan ,  Wan-Yu Chiang

IPC分类号： H01L23/522 ,  H01L23/00

CPC分类号： H01L24/13 ,  H01L23/5226 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/02181 ,  H01L2224/03622 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/11622 ,  H01L2224/13018

摘要： A semiconductor die including mechanical-stress-resistant bump structures is provided. The semiconductor die includes dielectric material layers embedding metal interconnect structures, a connection pad-and-via structure, and a bump structure including a bump via portion and a bonding bump portion. The entirety of a bottom surface of the bump via portion is located within an area of a horizontal top surface of a pad portion of the connection pad-and-via structure.

公开(公告)号：US20240194633A1

公开(公告)日：2024-06-13

申请号：US18188621

申请日：2023-03-23

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Amram Eitan ,  Hui-Ting Lin ,  Chien-Hung Chen ,  Chih-Yuan Chiu ,  Kai Jun Zhan

IPC分类号： H01L23/00

CPC分类号： H01L24/75 ,  H01L24/81 ,  H01L2224/75318 ,  H01L2224/7592 ,  H01L2224/75983 ,  H01L2224/80203 ,  H01L2224/80895 ,  H01L2224/80908 ,  H01L2224/81203 ,  H01L2224/81908

摘要： A die bonding tool includes a bond head that secures a semiconductor die against a planar surface of the bond head, an actuator system that moves the bond head and the semiconductor die towards a surface of a target substrate, and at least one contact sensor configured to detect an initial contact between a first region of the semiconductor die and the surface of the target substrate, where in response to detecting the initial contact between the semiconductor die and the target substrate, the actuator tilts the planar surface of the bond head and the semiconductor die to bring a second region of the semiconductor die into contact with the surface of the target substrate and thereby provide improved contact between the semiconductor die and the target substrate and more effective bonding including instances where the planar surface of the bond head and the target substrate surface are not parallel.

公开(公告)号：US20240128219A1

公开(公告)日：2024-04-18

申请号：US18530286

申请日：2023-12-06

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Hui-Min Huang ,  Wei-Hung Lin ,  Kai Jun Zhan ,  Chang-Jung Hsueh ,  Wan-Yu Chiang ,  Ming-Da Cheng

IPC分类号： H01L23/00 ,  H01L23/522

CPC分类号： H01L24/13 ,  H01L23/5226 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/02181 ,  H01L2224/03622 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/11622 ,  H01L2224/13018

摘要： A semiconductor die including mechanical-stress-resistant bump structures is provided. The semiconductor die includes dielectric material layers embedding metal interconnect structures, a connection pad-and-via structure, and a bump structure including a bump via portion and a bonding bump portion. The entirety of a bottom surface of the bump via portion is located within an area of a horizontal top surface of a pad portion of the connection pad-and-via structure.