BARRIER LAYER FOR WEAKENED BOUNDARY EFFECT
    5.
    发明公开

    公开(公告)号:US20240112957A1

    公开(公告)日:2024-04-04

    申请号:US18153553

    申请日:2023-01-12

    IPC分类号: H01L21/8238 H01L27/092

    CPC分类号: H01L21/823842 H01L27/0924

    摘要: A fabrication method is disclosed that includes: forming a first metal layer over first and second semiconductor structures; forming a first patterned photolithographic layer with an opening that exposes a portion of the first metal layer over the first semiconductor structure but not to a boundary between semiconductor structures; removing the exposed portion of the first metal layer; forming a second metal layer over the first and second semiconductor structures; forming a second patterned photolithographic layer with an opening that exposes a portion of the second metal layer over the second semiconductor structure but not to the boundary; removing the exposed portion of the first and second metal layers; wherein a barrier structure is generated between the first and second semiconductor structures that includes remaining portions of the first metal layer and a portion of the second metal layer overlying the remaining portions of the first metal layer.

    SEMICONDUCTOR DEVICE WITH CUT METAL GATE AND METHOD OF MANUFACTURE

    公开(公告)号:US20210249313A1

    公开(公告)日:2021-08-12

    申请号:US16787625

    申请日:2020-02-11

    IPC分类号: H01L21/8238 H01L27/092

    摘要: An anchored cut-metal gate (CMG) plug, a semiconductor device including the anchored CMG plug and methods of forming the semiconductor device are disclosed herein. The method includes performing a series of etching processes to form a trench through a metal gate electrode, through an isolation region, and into a semiconductor substrate. The trench cuts-through and separates the metal gate electrode into a first metal gate and a second metal gate and forms a recess in the semiconductor substrate. Once the trench has been formed, a dielectric plug material is deposited into the trench to form a CMG plug that is anchored within the recess of the semiconductor substrate and separates the first and second metal gates. As such, the anchored CMG plug provides high levels of resistance to reduce leakage current within the semiconductor device during operation and allowing for improved V-trigger performance of the semiconductor device.