Communication system and method of data communications
    9.
    发明授权
    Communication system and method of data communications 有权
    通信系统和数据通信方法

    公开(公告)号:US09559733B1

    公开(公告)日:2017-01-31

    申请号:US14927783

    申请日:2015-10-30

    CPC classification number: H04B1/1027 H04B2001/1054 H04W4/80 H04W84/12

    Abstract: A communication system includes a carrier generator configured to generate a first carrier signal and a demodulator configured to demodulate a modulated signal responsive to the first carrier signal. The demodulator includes a filter and a bandwidth adjusting circuit. The filter is configured to filter a first signal. The first signal is a product of the first carrier signal and the modulated signal. The filter has a first cutoff frequency and a bandwidth. The bandwidth of the filter is controlled by a set of control signals. The bandwidth adjusting circuit is configured to adjust the bandwidth of the filter based on a frequency of the filtered first signal and a frequency of the first signal, or a phase of the filtered first signal and a phase of the first signal. The bandwidth adjusting circuit is configured to generate the set of control signals.

    Abstract translation: 通信系统包括被配置为产生第一载波信号的载波发生器和被配置为响应于第一载波信号来解调调制信号的解调器。 解调器包括滤波器和带宽调整电路。 过滤器被配置为过滤第一个信号。 第一信号是第一载波信号和调制信号的乘积。 滤波器具有第一截止频率和带宽。 滤波器的带宽由一组控制信号控制。 带宽调整电路被配置为基于滤波的第一信号的频率和第一信号的频率,或滤波的第一信号的相位和第一信号的相位来调整滤波器的带宽。 带宽调整电路被配置为产生一组控制信号。

    Phase frequency detector circuit
    10.
    发明授权
    Phase frequency detector circuit 有权
    相位检波电路

    公开(公告)号:US09374038B2

    公开(公告)日:2016-06-21

    申请号:US14133982

    申请日:2013-12-19

    CPC classification number: H03D13/00 H03D13/004 H03L7/087 H03L7/089 H03L7/10

    Abstract: A phase frequency detector circuit includes an edge detector circuit, a plurality of phase frequency detector sub-circuits, and a decision circuit. The edge detector circuit is configured to receive a first input signal and a second input signal. The decision circuit is configured to detect whether a blind condition exits based on outputs of the edge detector circuit and outputs of the plurality of phase frequency detector sub-circuits. Responsive to a result of the decision circuit, a corresponding frequency detector sub-circuit of the plurality of phase frequency detector sub-circuit is configured to provide signals for use in determining a phase difference between the first input signal and the second input signal.

    Abstract translation: 相位频率检测器电路包括边缘检测器电路,多个相位频率检测器子电路和判定电路。 边缘检测器电路被配置为接收第一输入信号和第二输入信号。 判定电路被配置为基于边缘检测器电路的输出和多个相位频率检测器子电路的输出来检测盲状态是否退出。 响应于判定电路的结果,多个相位频率检测器子电路的对应的频率检测器子电路被配置为提供用于确定第一输入信号和第二输入信号之间的相位差的信号。

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