公开(公告)号：US20190181247A1

公开(公告)日：2019-06-13

申请号：US16278434

申请日：2019-02-18

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Bo-Cyuan Lu ,  Tai-Chun Huang

IPC分类号： H01L29/66 ,  H01L21/3213 ,  H01L21/02 ,  H01L29/78 ,  H01L21/311 ,  H01L21/033 ,  C23C16/455 ,  C23C16/34 ,  C23C16/30

摘要： A method of manufacturing a semiconductor device comprises forming a spacer material on the semiconductor fin and the gate stack, wherein the forming the spacer material further comprises using atomic layer deposition to deposit a first material on the semiconductor fin and using atomic layer deposition to deposit a second material on the first material, wherein the second material is different from the first material. The spacer material is removed from the semiconductor fin, wherein the removing the spacer material further comprises implanting an etching modifier into the spacer material to form a modified spacer material and removing the modified spacer material.

公开(公告)号：US20180151699A1

公开(公告)日：2018-05-31

申请号：US15404772

申请日：2017-01-12

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Bo-Cyuan Lu ,  Tai-Chun Huang

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L21/02 ,  H01L21/3115 ,  H01L21/311

CPC分类号： H01L29/66795 ,  C23C16/30 ,  C23C16/345 ,  C23C16/45525 ,  H01L21/02126 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/0228 ,  H01L21/0337 ,  H01L21/31111 ,  H01L21/31155 ,  H01L21/32139 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/7851

摘要： A method of manufacturing a semiconductor device comprises forming a spacer material on the semiconductor fin and the gate stack, wherein the forming the spacer material further comprises using atomic layer deposition to deposit a first material on the semiconductor fin and using atomic layer deposition to deposit a second material on the first material, wherein the second material is different from the first material. The spacer material is removed from the semiconductor fin, wherein the removing the spacer material further comprises implanting an etching modifier into the spacer material to form a modified spacer material and removing the modified spacer material.

公开(公告)号：US20190341476A1

公开(公告)日：2019-11-07

申请号：US16511764

申请日：2019-07-15

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chi On Chui ,  Bo-Cyuan Lu

IPC分类号： H01L29/66 ,  H01L21/02 ,  H01L21/28 ,  H01L21/3105

摘要： A method includes depositing an inhibitor layer on a first surface, depositing a film on a second surface by performing a first set of deposition cycles. Each deposition cycle includes adsorbing a first precursor over the second surface, performing a first purge process, adsorbing a second precursor over the second surface, and performing a second purge process. The method also includes performing a third purge process that is different from the first purge process or the second purge process.

公开(公告)号：US20180337100A1

公开(公告)日：2018-11-22

申请号：US16048483

申请日：2018-07-30

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kai-Hsuan Lee ,  Chia-Ta Yu ,  Cheng-Yu Yang ,  Sheng-Chen Wang ,  Bo-Yu Lai ,  Bo-Cyuan Lu ,  Chi On Chui ,  Sai-Hooi Yeong ,  Feng-Cheng Yang ,  Yen-Ming Chen

IPC分类号： H01L21/8238 ,  H01L29/49 ,  H01L29/08 ,  H01L27/092

摘要： A method includes forming a gate dielectric layer on a semiconductor fin, and forming a gate electrode over the gate dielectric layer. The gate electrode extends on sidewalls and a top surface of the semiconductor fin. A gate spacer is selectively deposited on a sidewall of the gate electrode. An exposed portion of the gate dielectric layer is free from a same material for forming the gate spacer deposited thereon. The method further includes etching the gate dielectric layer using the gate spacer as an etching mask to expose a portion of the semiconductor fin, and forming an epitaxy semiconductor region based on the semiconductor fin.

公开(公告)号：US20200035814A1

公开(公告)日：2020-01-30

申请号：US16593209

申请日：2019-10-04

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chung-Ting Ko ,  Bo-Cyuan Lu ,  Jr-Hung Li ,  Chi On Chui

IPC分类号： H01L29/66 ,  H01L21/02 ,  H01L21/8238 ,  H01L29/78 ,  H01L21/32 ,  H01L21/762 ,  H01L21/308

摘要： A FinFET device and a method of forming the same are provided. A method includes forming a fin extending above an isolation region. A sacrificial gate is formed over the fin. A first dielectric material is selectively deposited on sidewalls of the sacrificial gate to form spacers on the sidewalls of the sacrificial gate. The fin is patterned using the sacrificial gate and the spacers as a combined mask to form a recess in the fin. An epitaxial source/drain region is formed in the recess.

公开(公告)号：US10355111B2

公开(公告)日：2019-07-16

申请号：US15694636

申请日：2017-09-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chi On Chui ,  Bo-Cyuan Lu

IPC分类号： H01L29/66 ,  H01L21/02 ,  H01L21/28 ,  H01L21/3105 ,  H01L21/32

摘要： A method includes depositing an inhibitor layer on a first surface, depositing a film on a second surface by performing a first set of deposition cycles. Each deposition cycle includes adsorbing a first precursor over the second surface, performing a first purge process, adsorbing a second precursor over the second surface, and performing a second purge process. The method also includes performing a third purge process that is different from the first purge process or the second purge process.

公开(公告)号：US20190103477A1

公开(公告)日：2019-04-04

申请号：US15907633

申请日：2018-02-28

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chung-Ting Ko ,  Bo-Cyuan Lu ,  Jr-Hung Li ,  Chi On Chui

IPC分类号： H01L29/66 ,  H01L21/308 ,  H01L21/762

摘要： A FinFET device and a method of forming the same are provided. A method includes forming a fin extending above an isolation region. A sacrificial gate is formed over the fin. A first dielectric material is selectively deposited on sidewalls of the sacrificial gate to form spacers on the sidewalls of the sacrificial gate. The fin is patterned using the sacrificial gate and the spacers as a combined mask to form a recess in the fin. An epitaxial source/drain region is formed in the recess.

公开(公告)号：US10211318B2

公开(公告)日：2019-02-19

申请号：US15404772

申请日：2017-01-12

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Bo-Cyuan Lu ,  Tai-Chun Huang

IPC分类号： C23C16/30 ,  C23C16/34 ,  H01L21/02 ,  H01L29/66 ,  H01L29/78 ,  C23C16/455 ,  H01L21/033 ,  H01L21/311 ,  H01L21/3115 ,  H01L21/3213

摘要： A method of manufacturing a semiconductor device comprises forming a spacer material on the semiconductor fin and the gate stack, wherein the forming the spacer material further comprises using atomic layer deposition to deposit a first material on the semiconductor fin and using atomic layer deposition to deposit a second material on the first material, wherein the second material is different from the first material. The spacer material is removed from the semiconductor fin, wherein the removing the spacer material further comprises implanting an etching modifier into the spacer material to form a modified spacer material and removing the modified spacer material.

公开(公告)号：US10037923B1

公开(公告)日：2018-07-31

申请号：US15491384

申请日：2017-04-19

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kai-Hsuan Lee ,  Chia-Ta Yu ,  Cheng-Yu Yang ,  Sheng-Chen Wang ,  Bo-Yu Lai ,  Bo-Cyuan Lu ,  Chi On Chui ,  Sai-Hooi Yeong ,  Feng-Cheng Yang ,  Yen-Ming Chen

IPC分类号： H01L21/8238 ,  H01L27/092 ,  H01L29/49 ,  H01L29/08

CPC分类号： H01L21/823864 ,  H01L21/823418 ,  H01L21/823468 ,  H01L21/823814 ,  H01L21/823821 ,  H01L27/0924 ,  H01L29/0847 ,  H01L29/4983

摘要： A method includes forming a gate dielectric layer on a semiconductor fin, and forming a gate electrode over the gate dielectric layer. The gate electrode extends on sidewalls and a top surface of the semiconductor fin. A gate spacer is selectively deposited on a sidewall of the gate electrode. An exposed portion of the gate dielectric layer is free from a same material for forming the gate spacer deposited thereon. The method further includes etching the gate dielectric layer using the gate spacer as an etching mask to expose a portion of the semiconductor fin, and forming an epitaxy semiconductor region based on the semiconductor fin.

公开(公告)号：US11133229B2

公开(公告)日：2021-09-28

申请号：US16740895

申请日：2020-01-13

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kai-Hsuan Lee ,  Chia-Ta Yu ,  Cheng-Yu Yang ,  Sheng-Chen Wang ,  Bo-Yu Lai ,  Bo-Cyuan Lu ,  Chi On Chui ,  Sai-Hooi Yeong ,  Feng-Cheng Yang ,  Yen-Ming Chen

IPC分类号： H01L21/8238 ,  H01L27/092 ,  H01L29/49 ,  H01L29/08 ,  H01L21/8234 ,  H01L29/66

摘要： A method includes forming a gate dielectric layer on a semiconductor fin, and forming a gate electrode over the gate dielectric layer. The gate electrode extends on sidewalls and a top surface of the semiconductor fin. A gate spacer is selectively deposited on a sidewall of the gate electrode. An exposed portion of the gate dielectric layer is free from a same material for forming the gate spacer deposited thereon. The method further includes etching the gate dielectric layer using the gate spacer as an etching mask to expose a portion of the semiconductor fin, and forming an epitaxy semiconductor region based on the semiconductor fin.