公开(公告)号：US20200258672A1

公开(公告)日：2020-08-13

申请号：US16860337

申请日：2020-04-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsiao-Tsung Yen ,  Huan-Neng Chen ,  Yu-Ling Lin ,  Chin-Wei Kuo ,  Mei-Show Chen ,  Ho-Hsiang Chen ,  Min-Chie Jeng

IPC: H01F27/28 ,  H01L23/522 ,  H01F17/00

Abstract: A device includes a substrate, and a vertical inductor over the substrate. The vertical inductor includes a plurality of parts formed of metal, wherein each of the parts extends in one of a plurality of planes perpendicular to a major surface of the substrate. Metal lines interconnect neighboring ones of the plurality of parts of the vertical inductor.

公开(公告)号：US11410952B2

公开(公告)日：2022-08-09

申请号：US16923574

申请日：2020-07-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsiao-Tsung Yen ,  Jhe-Ching Lu ,  Yu-Ling Lin ,  Chin-Wei Kuo ,  Min-Chie Jeng

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H01L25/00

Abstract: An integrated circuit package includes a die. An electrically conductive layer comprises a redistribution layer (RDL) in the die, or a micro-bump layer above the die, or both. The micro bump layer comprises at least one micro-bump line. A filter comprises the electrically conductive layer. A capacitor comprises an electrode formed in the electrically conductive layer.

公开(公告)号：US11978712B2

公开(公告)日：2024-05-07

申请号：US17098602

申请日：2020-11-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chin-Wei Kuo ,  Hsiao-Tsung Yen ,  Min-Chie Jeng ,  Yu-Ling Lin

IPC: H01L21/768 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/495 ,  H01L23/498 ,  H01L23/522 ,  H01L23/525 ,  H01L23/528 ,  H01L23/532 ,  H01L23/66 ,  H01L25/065 ,  H01P5/02

CPC classification number: H01L24/11 ,  H01L21/563 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/5225 ,  H01L23/525 ,  H01L23/66 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53257 ,  H01L23/5329 ,  H01L2223/6627 ,  H01L2924/0002 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/014 ,  H01P5/028 ,  Y10T29/49124 ,  H01L2924/0002 ,  H01L2924/0001 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods and apparatus for forming a semiconductor device package with a transmission line using a micro-bump layer are disclosed. The micro-bump layer may comprise micro-bumps and micro-bump lines, formed between a top device and a bottom device. A signal transmission line may be formed using a micro-bump line above a bottom device. A ground plane may be formed using a redistribution layer (RDL) within the bottom device, or using additional micro-bump lines. The RDL formed ground plane may comprise open slots. There may be RDLs at the bottom device and the top device above and below the micro-bump lines to form parts of the ground planes.

公开(公告)号：US11145767B2

公开(公告)日：2021-10-12

申请号：US16834312

申请日：2020-03-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsiao-Tsung Yen ,  Yu-Ling Lin ,  Chin-Wei Kuo ,  Ho-Hsiang Chen ,  Chewn-Pu Jou ,  Min-Chie Jeng

IPC: H01L31/00 ,  H01L21/00 ,  H01L29/94 ,  H01L29/66 ,  H01L21/66 ,  H01L27/06 ,  H01L49/02 ,  H01L23/48 ,  H01L23/58

Abstract: A semiconductor structure is provided. The semiconductor structure includes a floating substrate; and a capacitor grounded and connected to the floating substrate. A method of manufacturing a semiconductor structure is also provided.

公开(公告)号：US10192833B2

公开(公告)日：2019-01-29

申请号：US14943063

申请日：2015-11-17

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Feng-Wei Kuo ,  Hui Yu Lee ,  Huan-Neng Chen ,  Yen-Jen Chen ,  Yu-Ling Lin ,  Chewn-Pu Jou

IPC: H01L23/552 ,  H01L23/498 ,  H01L23/66 ,  H01L23/14 ,  H01L23/538 ,  H01L23/00 ,  H01L23/31 ,  H01L23/64 ,  H01L25/065

Abstract: Interposer and semiconductor package embodiments provide for the isolation and suppression of electronic noise such as EM emissions in the semiconductor package. The interposer includes shield structures in various embodiments, the shield structures blocking the electrical noise from the noise source, from other electrical signals or devices. The shields include solid structures and some embodiments and decoupling capacitors in other embodiments. The coupling structures includes multiple rows of solder balls included in strips that couple the components and surround and contain the source of electrical noise.

公开(公告)号：US09385246B2

公开(公告)日：2016-07-05

申请号：US14594201

申请日：2015-01-12

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Hsiao-Tsung Yen ,  Yu-Ling Lin ,  Chin-Wei Kuo ,  Min-Chie Jeng

IPC: H01L29/94 ,  H01L23/522 ,  H01L49/02

CPC classification number: H01L29/94 ,  H01L23/5223 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A differential MOS capacitor includes a first plurality of upper capacitor plates, a second plurality of upper capacitor plates, and a conductive plate. At least two of the second plurality of upper capacitor plates are spaced laterally from each other and are disposed laterally between at least two of the first plurality of upper capacitor plates. The conductive plate is configured to serve as a common bottom capacitor plate such that a first capacitor is formed by the first plurality of upper capacitor plates and the conductive plate and a second capacitor is formed by the second plurality of upper capacitor plates and the conductive plate.

Abstract translation: 差分MOS电容器包括第一多个上电容器板，第二多个上电容器板和导电板。 第二组多个上部电容器板中的至少两个彼此横向隔开并横向设置在第一组多个上部电容器板中的至少两个之间。 导电板被配置为用作公共底部电容器板，使得第一电容器由第一多个上电容器板和导电板形成，并且第二电容器由第二多个上电容器板和导电板形成 。

公开(公告)号：US09219039B2

公开(公告)日：2015-12-22

申请号：US14018634

申请日：2013-09-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Feng-Wei Kuo ,  Hui Yu Lee ,  Huan-Neng Chen ,  Yen-Jen Chen ,  Yu-Ling Lin ,  Chewn-Pu Jou

IPC: H01L23/552 ,  H01L23/538 ,  H01L23/14 ,  H01L23/00 ,  H01L25/16 ,  H01L23/498 ,  H01L23/31 ,  H01L23/64 ,  H01L25/065

CPC classification number: H01L23/552 ,  H01L23/147 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/642 ,  H01L23/66 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L25/0655 ,  H01L2223/6677 ,  H01L2224/131 ,  H01L2224/14135 ,  H01L2224/16225 ,  H01L2924/14 ,  H01L2924/1421 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/19042 ,  H01L2924/19104 ,  H01L2924/014

Abstract: Interposer and semiconductor package embodiments provide for the isolation and suppression of electronic noise such as EM emissions in the semiconductor package. The interposer includes shield structures in various embodiments, the shield structures blocking the electrical noise from the noise source, from other electrical signals or devices. The shields include solid structures and some embodiments and decoupling capacitors in other embodiments. The coupling structures includes multiple rows of solder balls included in strips that couple the components and surround and contain the source of electrical noise.

Abstract translation: 插入器和半导体封装实施例提供了隔离和抑制电子噪声，例如半导体封装中的EM发射。 插入器包括各种实施例中的屏蔽结构，屏蔽结构阻挡来自噪声源的电噪声与其它电信号或装置。 在其他实施例中，屏蔽件包括固体结构和一些实施例以及去耦电容器。 耦合结构包括多个包含在条中的焊球，其耦合部件并围绕并包含电噪声源。

公开(公告)号：US20210082848A1

公开(公告)日：2021-03-18

申请号：US17098602

申请日：2020-11-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chin-Wei Kuo ,  Hsiao-Tsung Yen ,  Min-Chie Jeng ,  Yu-Ling Lin

IPC: H01L23/00 ,  H01L23/525 ,  H01L23/498 ,  H01L23/66 ,  H01L23/522 ,  H01L21/56 ,  H01L25/065

Abstract: Methods and apparatus for forming a semiconductor device package with a transmission line using a micro-bump layer are disclosed. The micro-bump layer may comprise micro-bumps and micro-bump lines, formed between a top device and a bottom device. A signal transmission line may be formed using a micro-bump line above a bottom device. A ground plane may be formed using a redistribution layer (RDL) within the bottom device, or using additional micro-bump lines. The RDL formed ground plane may comprise open slots. There may be RDLs at the bottom device and the top device above and below the micro-bump lines to form parts of the ground planes.

公开(公告)号：US10971296B2

公开(公告)日：2021-04-06

申请号：US16860337

申请日：2020-04-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsiao-Tsung Yen ,  Huan-Neng Chen ,  Yu-Ling Lin ,  Chin-Wei Kuo ,  Mei-Show Chen ,  Ho-Hsiang Chen ,  Min-Chie Jeng

IPC: H01F27/28 ,  H01F17/00 ,  H01L23/522

Abstract: A device includes a substrate, and a vertical inductor over the substrate. The vertical inductor includes a plurality of parts formed of metal, wherein each of the parts extends in one of a plurality of planes perpendicular to a major surface of the substrate. Metal lines interconnect neighboring ones of the plurality of parts of the vertical inductor.

公开(公告)号：US20200335465A1

公开(公告)日：2020-10-22

申请号：US16923574

申请日：2020-07-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsiao-Tsung Yen ,  Jhe-Ching Lu ,  Yu-Ling Lin ,  Chin-Wei Kuo ,  Min-Chie Jeng

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H01L25/00

Abstract: An integrated circuit package includes a die. An electrically conductive layer comprises a redistribution layer (RDL) in the die, or a micro-bump layer above the die, or both. The micro bump layer comprises at least one micro-bump line. A filter comprises the electrically conductive layer. A capacitor comprises an electrode formed in the electrically conductive layer.