Abstract:
A system includes a tunable bulk acoustic wave (BAW) resonator device and a direct-current (DC) tuning controller coupled to the tunable BAW resonator device. The system also includes an oscillator circuit coupled to the tunable BAW resonator device. The DC tuning controller selectively adjusts a DC tuning signal applied to the tunable BAW resonator device to adjust a signal frequency generated by the oscillator circuit.
Abstract:
A clock oscillator includes with a pullable BAW oscillator to generate an output signal with a target frequency. The BAW oscillator is based on a BAW resonator and voltage-controlled variable load capacitance, responsive to a capacitance control signal to provide a selectable load capacitance. An oscillator driver (such as a differential negative gm transconductance amplifier), is coupled to the BAW oscillator to provide an oscillation drive signal. The BAW oscillator is responsive to the oscillation drive signal to generate the output signal with a frequency based on the selectable load capacitance. The oscillator driver can include a bandpass filter network with a resonance frequency substantially at the target frequency.
Abstract:
A clock oscillator includes with a pullable BAW oscillator to generate an output signal with a target frequency. The BAW oscillator is based on a BAW resonator and voltage-controlled variable load capacitance, responsive to a capacitance control signal to provide a selectable load capacitance. An oscillator driver (such as a differential negative gm transconductance amplifier), is coupled to the BAW oscillator to provide an oscillation drive signal. The BAW oscillator is responsive to the oscillation drive signal to generate the output signal with a frequency based on the selectable load capacitance. The oscillator driver can include a bandpass filter network with a resonance frequency substantially at the target frequency.
Abstract:
For producing a low-power, low-phase noise oscillating signal using a self-injection locking oscillator, examples include: producing, using an oscillator, a signal having a base frequency component, an Mth harmonic component and a Pth harmonic component, in which M and P are selected integers and M>P>1; filtering the signal through one or more bandpass filters including at least two resonators, the filters having Q factor ≥5, the filters configured to pass the Mth and Pth harmonic components; multiplying the filtered Mth and Pth harmonic components together to produce a multiplied signal, and filtering the multiplied signal using a low pass filter to pass a difference between the filtered Mth and Pth harmonic components, the difference including a filtered beat frequency waveform; and injecting the filtered beat frequency waveform into the oscillator to injection lock the signal to the filtered beat frequency waveform.
Abstract:
The present disclosure describes a low-power, low-phase-noise (LPLPN) oscillator. The LPLPN oscillator includes a resonator load, an amplifier stage, and a loop gain control circuit. The resonator load is structured to resonate at a primary resonant frequency. The amplifier stage is coupled with the resonator load to develop a loop gain that peaks at the primary resonant frequency. The loop gain control circuit is coupled with the amplifier stage, and it is structured to regulate the loop gain for facilitating the amplifier stage to generate an oscillation signal at the primary resonant frequency and suppress a noise signal at a parasitic parallel resonant frequency (PPRF).
Abstract:
Methods and systems for producing a low-power, low-phase noise oscillating signal using a self-injection locking oscillator. Preferred embodiments include, for example, producing, using an oscillator, a signal having a base frequency component, an Mth harmonic component and a Pth harmonic component, wherein M and P are selected integers and M>P>1; filtering said signal through one or more bandpass filters comprising at least two resonators, said filters having Q factor ≥5, said filters configured to pass said Mth and Pth harmonic components; multiplying said filtered Mth and Pth harmonic components together to produce a multiplied signal, and filtering said multiplied signal using a low pass filter to pass a difference between said filtered Mth and Pth harmonic components, said difference comprising a filtered beat frequency waveform; and injecting said filtered beat frequency waveform into said oscillator to thereby injection lock said signal to said filtered beat frequency waveform.
Abstract:
A high linearity phase interpolator (PI) is disclosed. A phase value parameter indicative of a desired phase difference between an output signal and an input clock signal edge may be provided by control logic. A first capacitor may be charged for a first period of time with a first current that is proportional to the phase value parameter to produce a first voltage on the capacitor that is proportional to the phase value parameter. The first capacitor may be further charged for a second period of time with a second current that has a constant value to form a voltage ramp offset by the first voltage. A reference voltage may be compared to the voltage ramp during the second period of time. The output signal may be asserted at a time when the voltage ramp equals the reference voltage.
Abstract:
A Continuous Time Linear Equalizer (CTLE) and a method of operating a CTLE in a receiver for a Pulse Amplitude Modulation (PAM) signal are disclosed. The method includes initiating equalization using an initial equalization setting that is optimized to meet a first objective and responsive to a determination, shifting to a final equalization setting that is optimized to meet a second objective.
Abstract:
The present disclosure describes a low-power, low-phase-noise (LPLPN) oscillator. The LPLPN oscillator includes a resonator load, an amplifier stage, and a loop gain control circuit. The resonator load is structured to resonate at a primary resonant frequency. The amplifier stage is coupled with the resonator load to develop a loop gain that peaks at the primary resonant frequency. The loop gain control circuit is coupled with the amplifier stage, and it is structured to regulate the loop gain for facilitating the amplifier stage to generate an oscillation signal at the primary resonant frequency and suppress a noise signal at a parasitic parallel resonant frequency (PPRF).
Abstract:
A method for adapting a mixed signal Infinite Impulse Response (IIR) Decision Feedback Equalizer (DFE) using pivot taps and monitor taps is disclosed. The method includes, for a given IIR path for a received signal, updating gain of the given IIR path using a respective pivot tap error-data correlation with a first Least Mean Square (LMS) update equation; and updating a time constant of the given IIR path using a respective monitor tap error-data correlation with a second LMS update equation.