公开(公告)号：US09865601B2

公开(公告)日：2018-01-09

申请号：US14971461

申请日：2015-12-16

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Kai-Chun Lin ,  Yu-Der Chih ,  Chia-Fu Lee

IPC: H01L27/11 ,  H01L27/105 ,  H01L27/02

CPC classification number: H01L27/1052 ,  H01L27/0207 ,  H01L27/105 ,  H01L27/11206 ,  H01L27/228 ,  H01L27/2436

Abstract: The present disclosure relates to a semiconductor integrated circuit. The semiconductor integrated circuit includes a substrate, a first transistor and a first patterned conductive layer. The first transistor has a source region, a drain region in the substrate and a gate region on the substrate. The first patterned conductive layer is electrically connected to the drain region of the first transistor. The first patterned conductive layer includes a first section, a second section and a fusible device.

公开(公告)号：US10372948B2

公开(公告)日：2019-08-06

申请号：US14969621

申请日：2015-12-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Kai-Chun Lin ,  Ku-Feng Lin ,  Hung-Chang Yu ,  Yu-Der Chih

IPC: G06F21/79 ,  G06F12/14

Abstract: A memory device is provided which comprises a memory array, a first scrambling circuit and a second scrambling circuit. The first scrambling circuit is configured to provide first scrambled data with a first scrambling pattern in response to input data. The second scrambling circuit is configured to provide second scrambled data with a second scrambling pattern in response to the first scrambled data.

公开(公告)号：US09806064B2

公开(公告)日：2017-10-31

申请号：US15071920

申请日：2016-03-16

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Hung-Chang Yu ,  Kai-Chun Lin ,  Yue-Der Chih

IPC: H01L29/80 ,  H01L25/065 ,  H01L23/00 ,  H01L23/498 ,  H01L21/56 ,  H01L23/31 ,  H01L25/00

CPC classification number: H01L25/0657 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/065 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/06181 ,  H01L2224/09181 ,  H01L2224/131 ,  H01L2224/16055 ,  H01L2224/16057 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1712 ,  H01L2224/17179 ,  H01L2224/17181 ,  H01L2224/75702 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/9202 ,  H01L2225/06517 ,  H01L2225/06582 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/11 ,  H01L2924/014

Abstract: A embodiment package includes a three dimensional integrated circuit (3D IC) with first input/output pads on a first side and second input/output pads on a second side, a first fan out structure electrically coupled to the first input/output pads on the first side of the three dimensional integrated circuit, and a second fan out structure electrically coupled to the second input/output pads on the second side of the three dimensional integrated circuit.

公开(公告)号：US20150187721A1

公开(公告)日：2015-07-02

申请号：US14144813

申请日：2013-12-31

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Hung-Chang Yu ,  Kai-Chun Lin ,  Yue-Der Chih

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L25/0657 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/065 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/06181 ,  H01L2224/09181 ,  H01L2224/131 ,  H01L2224/16055 ,  H01L2224/16057 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1712 ,  H01L2224/17179 ,  H01L2224/17181 ,  H01L2224/75702 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/9202 ,  H01L2225/06517 ,  H01L2225/06582 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/11 ,  H01L2924/014

Abstract: A embodiment package includes a three dimensional integrated circuit (3D IC) with first input/output pads on a first side and second input/output pads on a second side, a first fan out structure electrically coupled to the first input/output pads on the first side of the three dimensional integrated circuit, and a second fan out structure electrically coupled to the second input/output pads on the second side of the three dimensional integrated circuit.

Abstract translation: 实施例包装包括三维集成电路（3D IC），其具有第一侧上的第一输入/输出焊盘和第二侧上的第二输入/输出焊盘，电耦合到第二侧上的第一输入/输出焊盘的第一扇出结构 三维集成电路的第一侧，以及电耦合到三维集成电路的第二侧上的第二输入/输出焊盘的第二扇出结构。

公开(公告)号：US20160197060A1

公开(公告)日：2016-07-07

申请号：US15071920

申请日：2016-03-16

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Hung-Chang Yu ,  Kai-Chun Lin ,  Yue-Der Chih

IPC: H01L25/065 ,  H01L23/498 ,  H01L23/00 ,  H01L25/00 ,  H01L21/56

CPC classification number: H01L25/0657 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/065 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/06181 ,  H01L2224/09181 ,  H01L2224/131 ,  H01L2224/16055 ,  H01L2224/16057 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1712 ,  H01L2224/17179 ,  H01L2224/17181 ,  H01L2224/75702 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/9202 ,  H01L2225/06517 ,  H01L2225/06582 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/11 ,  H01L2924/014

Abstract: A embodiment package includes a three dimensional integrated circuit (3D IC) with first input/output pads on a first side and second input/output pads on a second side, a first fan out structure electrically coupled to the first input/output pads on the first side of the three dimensional integrated circuit, and a second fan out structure electrically coupled to the second input/output pads on the second side of the three dimensional integrated circuit.

公开(公告)号：US09299677B2

公开(公告)日：2016-03-29

申请号：US14144813

申请日：2013-12-31

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Hung-Chang Yu ,  Kai-Chun Lin ,  Yue-Der Chih

IPC: H01L29/80 ,  H01L23/00 ,  H01L23/498 ,  H01L21/56 ,  H01L23/31 ,  H01L25/065

CPC classification number: H01L25/0657 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/065 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/06181 ,  H01L2224/09181 ,  H01L2224/131 ,  H01L2224/16055 ,  H01L2224/16057 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1712 ,  H01L2224/17179 ,  H01L2224/17181 ,  H01L2224/75702 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/9202 ,  H01L2225/06517 ,  H01L2225/06582 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/11 ,  H01L2924/014

Abstract: A embodiment package includes a three dimensional integrated circuit (3D IC) with first input/output pads on a first side and second input/output pads on a second side, a first fan out structure electrically coupled to the first input/output pads on the first side of the three dimensional integrated circuit, and a second fan out structure electrically coupled to the second input/output pads on the second side of the three dimensional integrated circuit.

Abstract translation: 实施例包装包括三维集成电路（3D IC），其具有第一侧上的第一输入/输出焊盘和第二侧上的第二输入/输出焊盘，电耦合到第二侧上的第一输入/输出焊盘的第一扇出结构 三维集成电路的第一侧，以及电耦合到三维集成电路的第二侧上的第二输入/输出焊盘的第二扇出结构。