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公开(公告)号:US20200168583A1
公开(公告)日:2020-05-28
申请号:US16774983
申请日:2020-01-28
Inventor: Yu-Feng CHEN , Chun-Hung LIN , Han-Ping PU , Ming-Da CHENG , Kai-Chiang WU
Abstract: A semiconductor device includes a first semiconductor die package. The first semiconductor package includes a molding compound, and a conductive element in the molding compound, wherein a top surface of the conductive element is above or co-planar with a top-most surface of the molding compound. The semiconductor device further includes a second semiconductor die package The second semiconductor package includes a plurality of copper-containing contacts on a single metal pad, wherein each of the plurality of copper-containing contacts is bonded to the conductive element.
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公开(公告)号:US20160343691A1
公开(公告)日:2016-11-24
申请号:US15230695
申请日:2016-08-08
Inventor: Yu-Feng CHEN , Chun-Hung LIN , Han-Ping PU , Ming-Da CHENG , Kai-Chiang WU
IPC: H01L25/065 , H01L21/56 , H01L23/00 , H01L23/31 , H01L25/00
Abstract: A method of forming a semiconductor device includes preparing a first semiconductor die package with conductive elements embedded in a molding compound, wherein the conductive elements are exposed on a surface of the molding compound. A top surface of the conductive elements is above or co-planar with a top-most surface of the molding compound. The method further includes providing a second semiconductor die package; and bonding the conductive elements of the first semiconductor die package to contacts on the semiconductor die package.
Abstract translation: 一种形成半导体器件的方法包括:制备具有嵌入在模塑料中的导电元件的第一半导体管芯封装,其中导电元件暴露在模塑料的表面上。 导电元件的顶表面在模塑料的最上表面上方或共面。 该方法还包括提供第二半导体管芯封装; 以及将所述第一半导体管芯封装的导电元件接合到所述半导体管芯封装上的触点。
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公开(公告)号:US20160020186A1
公开(公告)日:2016-01-21
申请号:US14863942
申请日:2015-09-24
Inventor: Yu-Feng CHEN , Chun-Hung LIN , Han-Ping PU , Chih-Hang TUNG , Kai-Chiang WU , Ming-Che HO
IPC: H01L23/00
CPC classification number: H01L24/13 , H01L23/488 , H01L24/02 , H01L24/05 , H01L24/10 , H01L24/11 , H01L24/16 , H01L2224/0401 , H01L2224/05027 , H01L2224/05111 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05181 , H01L2224/05186 , H01L2224/05551 , H01L2224/05555 , H01L2224/05572 , H01L2224/05611 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05681 , H01L2224/05686 , H01L2224/10125 , H01L2224/1146 , H01L2224/1147 , H01L2224/11849 , H01L2224/13012 , H01L2224/13076 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/16237 , H01L2224/16238 , H01L2224/81191 , H01L2924/00014 , H01L2924/01029 , H01L2924/12042 , H01L2924/00012 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/01047 , H01L2224/05552 , H01L2924/00
Abstract: A semiconductor device includes an under-bump metallization (UBM) layer over a substrate. The semiconductor device also includes a copper-containing layer having a base portion over the UBM layer. The semiconductor device further includes a solder bump over the UBM layer and over the copper-containing layer. The base portion is embedded in the solder bump. The copper-containing layer has a cylindrical shape and includes at least two segments separated by at least two openings. A first total area (A) of the at least two openings is greater than about 3% of a second total area (B) of the at least two segments. The first total area (A) is less than about 70% of the second total area (B) of the at least two segments.
Abstract translation: 半导体器件包括在衬底上的凸起下金属化(UBM)层。 半导体器件还包括在UBM层上具有基底部分的含铜层。 半导体器件还包括在UBM层上方并且在含铜层上方的焊料凸块。 基部嵌入焊料凸块中。 含铜层具有圆筒形状,并且包括至少两个由至少两个开口分开的段。 所述至少两个开口的第一总面积(A)大于所述至少两个区段的第二总面积(B)的约3%。 第一总面积(A)小于至少两段的第二总面积(B)的约70%。
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公开(公告)号:US20150243622A1
公开(公告)日:2015-08-27
申请号:US14711864
申请日:2015-05-14
Inventor: Yuh Chern SHIEH , Han-Ping PU , Yu-Feng CHEN , Tin-Hao KUO
IPC: H01L23/00 , H01L23/498
CPC classification number: H01L24/14 , H01L23/488 , H01L23/49811 , H01L23/49838 , H01L24/10 , H01L24/11 , H01L24/12 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L2224/0401 , H01L2224/05572 , H01L2224/11849 , H01L2224/13005 , H01L2224/13013 , H01L2224/13014 , H01L2224/13015 , H01L2224/13082 , H01L2224/131 , H01L2224/13147 , H01L2224/1405 , H01L2224/14131 , H01L2224/145 , H01L2224/16104 , H01L2224/16225 , H01L2224/16227 , H01L2224/16238 , H01L2224/17104 , H01L2224/81191 , H01L2224/81424 , H01L2224/81444 , H01L2224/81447 , H01L2224/81455 , H01L2224/81464 , H01L2224/81484 , H01L2224/81815 , H01L2924/00013 , H01L2924/00014 , H01L2924/01029 , H01L2924/01322 , H01L2924/00012 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/014 , H01L2224/05552
Abstract: A package includes a first work piece with a metal trace on a surface of the first work piece, wherein the metal trace has a first axis, wherein the first work piece is rigid, and an entirety of the metal trace is on the first work piece. The package further includes a second work piece with a plurality of elongated bumps, wherein at least one of the plurality of elongated metal bumps has a second axis and at least another of the plurality of elongated metal bumps has a third axis, wherein the second and the third axes are not the same and the second axis is at a non-zero angle from the first axis, wherein the plurality of elongated bumps are electrically connected to the metal trace.
Abstract translation: 包装包括在第一工件的表面上具有金属迹线的第一工件,其中金属迹线具有第一轴线,其中第一工件是刚性的,并且整个金属迹线在第一工件上 。 所述封装还包括具有多个细长凸块的第二工件,其中所述多个细长金属凸块中的至少一个具有第二轴线,并且所述多个细长金属凸块中的至少另一个具有第三轴线,其中所述第二和 所述第三轴线不相同,所述第二轴线与所述第一轴线成非零角度,其中所述多个细长凸块电连接到所述金属轨迹。
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