SEMICONDUCTOR DEVICE
    1.
    发明申请

    公开(公告)号:US20200335608A1

    公开(公告)日:2020-10-22

    申请号:US16920197

    申请日:2020-07-02

    摘要: A semiconductor includes a substrate, a semiconductor fin, an STI structure, a fin sidewall spacer, and a doped silicon layer. The semiconductor fin extends from the substrate. The STI structure laterally surrounds a lower portion of the semiconductor fin. The fin sidewall spacer extends along a middle portion of the semiconductor fin that is above the lower portion of the semiconductor fin. The doped silicon layer wraps around three sides of an upper portion of the semiconductor fin that is above the middle portion of the semiconductor fin.

    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

    公开(公告)号:US20240234212A1

    公开(公告)日:2024-07-11

    申请号:US18416737

    申请日:2024-01-18

    摘要: A semiconductor device includes a semiconductor substrate, a first gate structure over the substrate, a second gate structure over the substrate, first gate spacers, second gate spacers, first and second metal layers spanning over the first and second gate structures, first and second contact plugs extending through the first and second metal layers, respectively. The first gate structure includes a first gate dielectric, and a first work function metal layer over the first gate dielectric. The second gate structure is wider than the first gate structure, wherein the second gate structure includes a second gate dielectric, a second work function metal layer over the second gate dielectric, and a filling conductor over the second work function metal layer. The first contact plug is in contact with the first work function metal layer, and the second contact plug is in contact with the filling conductor.

    SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF

    公开(公告)号:US20200279929A1

    公开(公告)日:2020-09-03

    申请号:US16875877

    申请日:2020-05-15

    摘要: A semiconductor device includes a semiconductor substrate, a pair of source/drain regions, and a gate stack. The pair of source/drain regions is on the semiconductor substrate. The gate stack is laterally between the source/drain regions and includes a gate dielectric layer over the semiconductor fin, a metal element-containing layer over the gate dielectric layer, and a fill metal layer over the metal element-containing layer. The metal element-containing layer has a dopant, and a concentration of the dopant in an upper portion of the metal element-containing layer is higher than a concentration of the dopant in a bottom portion of the metal element-containing layer.