公开(公告)号：US11908708B2

公开(公告)日：2024-02-20

申请号：US17479467

申请日：2021-09-20

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Huicheng Chang ,  Jyh-Cherng Sheu ,  Chen-Fong Tsai ,  Yun Chen Teng ,  Han-De Chen ,  Yee-Chia Yeo

IPC分类号： H01L21/56 ,  H01L25/065 ,  H01L25/00

CPC分类号： H01L21/568 ,  H01L21/561 ,  H01L25/0652 ,  H01L25/50

摘要： A method includes bonding a package component to a composite carrier. The composite carrier includes a base carrier and an absorption layer, and the absorption layer is between the base carrier and the package component. A laser beam is projected onto the composite carrier. The laser beam penetrates through the base carrier to ablate the absorption layer. The base carrier may then be separated from the package component.

公开(公告)号：US20230010038A1

公开(公告)日：2023-01-12

申请号：US17472086

申请日：2021-09-10

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Cheng-I Chu ,  Han-De Chen ,  Chen-Fong Tsai ,  Jyh-Cherng Sheu ,  Huicheng Chang ,  Yee-Chia Yeo

IPC分类号： H01L23/00 ,  H01L21/02 ,  H01L21/26 ,  H01J37/32

摘要： Wafer bonding apparatus and method are provided. A method includes performing a first plasma activation process on a first surface of a first wafer. The first plasma activation process forms a first high-activation region and a first low-activation region on the first surface of the first wafer. A first cleaning process is performed on the first surface of the first wafer. The first cleaning process forms a first plurality of silanol groups in the first high-activation region and the first low-activation region. The first high-activation region includes more silanol groups than the first low-activation region. The first wafer is bonded to a second wafer.

公开(公告)号：US20220367249A1

公开(公告)日：2022-11-17

申请号：US17377667

申请日：2021-07-16

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chieh Chang ,  Chen-Fong Tsai ,  Yun Chen Teng ,  Han-De Chen ,  Jyh-Cherng Sheu ,  Huicheng Chang ,  Yee-Chia Yeo

IPC分类号： H01L21/762 ,  H01L21/67

摘要： A method of forming a semiconductor device includes mounting a bottom wafer on a bottom chuck and mounting a top wafer on a top chuck, wherein one of the bottom chuck and the top chuck has a gasket. The top chuck is moved towards the bottom chuck. The gasket forms a sealed region between the bottom chuck and the top chuck around the top wafer and the bottom wafer. An ambient pressure in the sealed region is adjusted. The top wafer is bonded to the bottom wafer.

公开(公告)号：US10593775B2

公开(公告)日：2020-03-17

申请号：US16228872

申请日：2018-12-21

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Yee-Chia Yeo ,  Sung-Li Wang ,  Chi On Chui ,  Jyh-Cherng Sheu ,  Hung-Li Chiang ,  I-Sheng Chen

IPC分类号： H01L29/45 ,  H01L21/8234 ,  H01L21/8238 ,  H01L27/092 ,  H01L23/522 ,  H01L27/088 ,  H01L29/08 ,  H01L29/417 ,  H01L29/78

摘要： A semiconductor device includes a field effect transistor (FET). The FET includes a first channel, a first source and a first drain; a second channel, a second source and a second drain; and a gate structure disposed over the first and second channels. The gate structure includes a gate dielectric layer and a gate electrode layer. The first source includes a first crystal semiconductor layer and the second source includes a second crystal semiconductor layer. The first source and the second source are connected by an alloy layer made of one or more Group IV element and one or more transition metal elements. The first crystal semiconductor layer is not in direct contact with the second crystal semiconductor layer.

公开(公告)号：US09472669B1

公开(公告)日：2016-10-18

申请号：US14846414

申请日：2015-09-04

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Hung-Li Chiang ,  Cheng-Yi Peng ,  Jyh-Cherng Sheu ,  Yee-Chia Yeo

IPC分类号： H01L21/336 ,  H01L29/78 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/66

CPC分类号： H01L29/7849 ,  H01L21/26513 ,  H01L21/26586 ,  H01L23/535 ,  H01L29/0649 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/66803 ,  H01L29/7848 ,  H01L29/785 ,  H01L2029/7858

摘要： In a method of fabricating a Fin FET, first and second fin structures are formed. The first and second fin structures protrude from an isolation insulating layer. A gate structure is formed over the first and second fin structures, each of which has source/drain regions, having a first width, outside of the gate structure. Portions of sidewalls of the source/drain regions are removed to form trimmed source/drain regions, each of which has a second width smaller than the first width. A strain material is formed over the trimmed source/drain regions such that the strain material formed on the first fin structure is separated from that on the second fin structure. An interlayer dielectric layer is formed over the gate structure and the source/drain regions with the strain material. A contact layer is formed on the strain material such that the contact layer wraps around the strain material.

摘要翻译： 在制造Fin FET的方法中，形成第一和第二鳍结构。 第一和第二翅片结构从隔离绝缘层突出。 栅极结构形成在第一鳍片结构和第二鳍片结构之上，每个栅极结构具有在栅极结构外部具有第一宽度的源极/漏极区域。 去除源极/漏极区域的侧壁的部分以形成修整的源极/漏极区域，其中每个具有小于第一宽度的第二宽度。 在修整的源极/漏极区域上形成应变材料，使得形成在第一鳍状结构上的应变材料与第二鳍状结构上的应变材料分离。 在栅极结构和源极/漏极区之间用应变材料形成层间电介质层。 在应变材料上形成接触层，使得接触层缠绕在应变材料周围。

公开(公告)号：US11990404B2

公开(公告)日：2024-05-21

申请号：US17381583

申请日：2021-07-21

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chen-Fong Tsai ,  Cheng-I Chu ,  Jyh-Cherng Sheu ,  Huicheng Chang ,  Yee-Chia Yeo

IPC分类号： H01L21/00 ,  H01L23/367 ,  H01L23/46 ,  H01L23/528 ,  H01L29/40 ,  H01L29/417 ,  H01L29/06 ,  H01L29/423

CPC分类号： H01L23/528 ,  H01L23/3672 ,  H01L23/46 ,  H01L29/401 ,  H01L29/41733 ,  H01L29/0665 ,  H01L29/42392

摘要： Semiconductor devices having improved heat dissipation and methods of forming the same are disclosed. In an embodiment, a device includes a first transistor structure; a front-side interconnect structure on a front-side of the first transistor structure, the front-side interconnect structure including front-side conductive lines; a backside interconnect structure on a backside of the first transistor structure, the backside interconnect structure including backside conductive lines, the backside conductive lines having line widths greater than line widths of the front-side conductive lines; and a first heat dissipation substrate coupled to the backside interconnect structure.

公开(公告)号：US20240266285A1

公开(公告)日：2024-08-08

申请号：US18639595

申请日：2024-04-18

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chen-Fong Tsai ,  Cheng-I Chu ,  Jyh-Cherng Sheu ,  Huicheng Chang ,  Yee-Chia Yeo

IPC分类号： H01L23/528 ,  H01L23/367 ,  H01L23/46 ,  H01L29/06 ,  H01L29/40 ,  H01L29/417 ,  H01L29/423

CPC分类号： H01L23/528 ,  H01L23/3672 ,  H01L23/46 ,  H01L29/401 ,  H01L29/41733 ,  H01L29/0665 ,  H01L29/42392

摘要： Semiconductor devices having improved heat dissipation and methods of forming the same are disclosed. In an embodiment, a device includes a first transistor structure; a front-side interconnect structure on a front-side of the first transistor structure, the front-side interconnect structure including front-side conductive lines; a backside interconnect structure on a backside of the first transistor structure, the backside interconnect structure including backside conductive lines, the backside conductive lines having line widths greater than line widths of the front-side conductive lines; and a first heat dissipation substrate coupled to the backside interconnect structure.

公开(公告)号：US20240153786A1

公开(公告)日：2024-05-09

申请号：US18410100

申请日：2024-01-11

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Huicheng Chang ,  Jyh-Cherng Sheu ,  Chen-Fong Tsai ,  Yun Chen Teng ,  Han-De Chen ,  Yee-Chia Yeo

IPC分类号： H01L21/56 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L21/568 ,  H01L21/561 ,  H01L25/0652 ,  H01L25/50

摘要： A method includes bonding a package component to a composite carrier. The composite carrier includes a base carrier and an absorption layer, and the absorption layer is between the base carrier and the package component. A laser beam is projected onto the composite carrier. The laser beam penetrates through the base carrier to ablate the absorption layer. The base carrier may then be separated from the package component.

公开(公告)号：US20230067346A1

公开(公告)日：2023-03-02

申请号：US17412768

申请日：2021-08-26

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Han-De Chen ,  Yun Chen Teng ,  Chen-Fong Tsai ,  Jyh-Cherng Sheu ,  Huicheng Chang ,  Yee-Chia Yeo

IPC分类号： H01L23/00 ,  H01L21/683

摘要： In an embodiment, a wafer bonding system includes a chamber, a gas inlet and a gas outlet configured to control a pressure of the chamber to be in a range from 1×10−2 mbar to 1520 torr, a first wafer chuck having a first surface to support a first wafer, and a second wafer chuck having a second surface to support a second wafer, the second surface being opposite the first surface, the second wafer chuck and the first wafer chuck being movable relative to each other, wherein the second surface that supports the second wafer is divided into zones, wherein a vacuum pressure of each zone is controlled independently of other zones.

公开(公告)号：US10546938B2

公开(公告)日：2020-01-28

申请号：US16228872

申请日：2018-12-21

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Yee-Chia Yeo ,  Sung-Li Wang ,  Chi On Chui ,  Jyh-Cherng Sheu ,  Hung-Li Chiang ,  I-Sheng Chen

IPC分类号： H01L29/45 ,  H01L21/8234 ,  H01L21/8238 ,  H01L27/092 ,  H01L23/522 ,  H01L27/088 ,  H01L29/08 ,  H01L29/417 ,  H01L29/78

摘要： A semiconductor device includes a field effect transistor (FET). The FET includes a first channel, a first source and a first drain; a second channel, a second source and a second drain; and a gate structure disposed over the first and second channels. The gate structure includes a gate dielectric layer and a gate electrode layer. The first source includes a first crystal semiconductor layer and the second source includes a second crystal semiconductor layer. The first source and the second source are connected by an alloy layer made of one or more Group IV element and one or more transition metal elements. The first crystal semiconductor layer is not in direct contact with the second crystal semiconductor layer.