公开(公告)号：US09390915B1

公开(公告)日：2016-07-12

申请号：US14691520

申请日：2015-04-20

申请人： Shanghai Huali Microelectronics Corporation

发明人： Quanbo Li ,  Jun Huang ,  Xiangguo Meng

IPC分类号： H01L21/762 ,  H01L21/02 ,  H01L21/311 ,  H01L21/66

CPC分类号： H01L21/02532 ,  H01L21/0206 ,  H01L21/02115 ,  H01L21/02118 ,  H01L21/02282 ,  H01L21/3086 ,  H01L21/31111 ,  H01L21/31133 ,  H01L21/76224 ,  H01L21/76232 ,  H01L22/26 ,  H01L29/165 ,  Y02P80/30

摘要： A process is used to form a protective layer to cover a divot between two regions of a semiconductor material. During etching processes, the protective layer protects the divot to be etched away and reduces material loss of a Silicon (Si)-shallow trench isolation (STI) substrate. A selective coverage is provided to protect the height of the Si-STI substrate and an Si-STI interface. A desirable geometry can be obtained for forming a silicon germanium (SiGe)layer with uniform thickness near the divot.

摘要翻译： 一种方法用于形成保护层以覆盖半导体材料的两个区域之间的凹陷。 在蚀刻过程中，保护层保护纹理被蚀刻掉，并减少硅（Si） - 浅沟槽隔离（STI）衬底的材料损失。 提供选择性覆盖以保护Si-STI衬底和Si-STI界面的高度。 可以获得期望的几何形状，用于形成具有均匀厚度的硅锗（SiGe）层。

公开(公告)号：US09171731B2

公开(公告)日：2015-10-27

申请号：US14085380

申请日：2013-11-20

申请人： Shanghai Huali Microelectronics Corporation

发明人： Jun Huang ,  ZhiBiao Mao ,  QuanBo Li ,  ZhiFeng Gan ,  RunLing Li

IPC分类号： H01L21/302 ,  H01L21/306 ,  H01L21/28 ,  H01L21/033 ,  H01L21/3213 ,  H01L21/308

CPC分类号： H01L21/306 ,  H01L21/0337 ,  H01L21/28123 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/32139

摘要： The invention relates to microelectronic technology and, more specifically, relates to a method of forming a gate with a LELE double pattern. The method adopts an ONO structure (Oxide-SiN-Oxide). The ONO structure is exposed twice, and the advanced patterning film is used as a mask in the processing of polysilicon etching. The ONO structure is used to replace the traditional hardmask of silicon oxide, and the substructure of ODL (Organic Under Layer) which is based on the spin-on, and the middle layer structure of SHB (Si-based hardmask). The method saves cost and improves the process of advanced patterning film as a mask with the nodes in 40 nm and above which is applied to the process with the nodes in 22/20 nm and below. Consequently, the maturity and stability of the process for poly gate with the nodes in 22/20 nm and below are improved.

摘要翻译： 本发明涉及微电子技术，更具体地说，涉及一种用LELE双重图案形成门的方法。 该方法采用ONO结构（Oxide-SiN-Oxide）。 ONO结构暴露两次，并且在多晶硅蚀刻的处理中使用先进的图案化膜作为掩模。 ONO结构用于替代传统的氧化硅硬掩模，以及基于旋涂的ODL（有机底层）的底层结构和SHB（Si基硬掩模）的中间层结构。 该方法节省了成本，并改进了高级图案化膜作为掩模的过程，其中40nm及以上的节点被应用于具有22/20nm及以下的节点的过程。 因此，22/20nm及以下节点的多晶硅栅极的成熟度和稳定性得到改善。

公开(公告)号：US20160218005A1

公开(公告)日：2016-07-28

申请号：US14691520

申请日：2015-04-20

申请人： Shanghai Huali Microelectronics Corporation

发明人： Quanbo Li ,  Jun Huang ,  Xiangguo Meng

IPC分类号： H01L21/02 ,  H01L21/66 ,  H01L21/762 ,  H01L21/311

CPC分类号： H01L21/02532 ,  H01L21/0206 ,  H01L21/02115 ,  H01L21/02118 ,  H01L21/02282 ,  H01L21/3086 ,  H01L21/31111 ,  H01L21/31133 ,  H01L21/76224 ,  H01L21/76232 ,  H01L22/26 ,  H01L29/165 ,  Y02P80/30

摘要： A process is used to form a protective layer to cover a divot between two regions of a semiconductor material. During etching processes, the protective layer protects the divot to be etched away and reduces material loss of a Silicon (Si)-shallow trench isolation (STI) substrate. A selective coverage is provided to protect the height of the Si-STI substrate and an Si-STI interface. A desirable geometry can be obtained for forming a silicon germanium (SiGe)layer with uniform thickness near the divot.

摘要翻译： 一种方法用于形成保护层以覆盖半导体材料的两个区域之间的凹陷。 在蚀刻过程中，保护层保护纹理被蚀刻掉，并减少硅（Si） - 浅沟槽隔离（STI）衬底的材料损失。 提供选择性覆盖以保护Si-STI衬底和Si-STI界面的高度。 可以获得期望的几何形状，用于形成具有均匀厚度的硅锗（SiGe）层。

公开(公告)号：US09449866B2

公开(公告)日：2016-09-20

申请号：US14590011

申请日：2015-01-06

申请人： Shanghai Huali Microelectronics Corporation

发明人： Quanbo Li ,  Jun Huang ,  Xiangguo Meng ,  Yu Zhang

IPC分类号： H01L21/76 ,  H01L21/762 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/02 ,  H01L21/311

CPC分类号： H01L21/76205 ,  H01L21/02057 ,  H01L21/02238 ,  H01L21/02252 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/31116 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7848

摘要： The invention discloses a treatment process for a semiconductor, comprising providing a substrate, the substrate comprises silicon material; defining a trench region; removing the trench region using a plasma etching process and exposing a trench surface, the trench surface comprising surface defects; forming an oxidation layer overlaying the trench surface; removing the oxidation layer and at least a portion of the surface defects; expositing a treated trench surface, the treated trench surface being substantially free from surface defects; and forming a layer of silicon germanium material overlaying the treated trench surface. The invention further provides a semiconductor processing technique used to eliminate or reduce dislocation defect on the semiconductor device and improve device performance. In the treatment process, a substrate is subjected to at least one oxidation-deoxidation processes, where an oxidation layer is formed and then removed.

摘要翻译： 本发明公开了一种用于半导体的处理方法，包括提供衬底，所述衬底包括硅材料; 限定沟槽区域; 使用等离子体蚀刻工艺去除沟槽区域并暴露沟槽表面，沟槽表面包括表面缺陷; 形成覆盖所述沟槽表面的氧化层; 去除氧化层和至少一部分表面缺陷; 展开经处理的沟槽表面，处理的沟槽表面基本上没有表面缺陷; 以及形成覆盖处理过的沟槽表面的硅锗材料层。 本发明还提供了用于消除或减少半导体器件上的位错缺陷并提高器件性能的半导体处理技术。 在处理过程中，对基材进行至少一种氧化 - 脱氧工艺，其中形成氧化层然后除去。

公开(公告)号：US20150270127A1

公开(公告)日：2015-09-24

申请号：US14590011

申请日：2015-01-06

申请人： Shanghai Huali Microelectronics Corporation

发明人： Quanbo Li ,  Jun Huang ,  Xiangguo Meng ,  Yu Zhang

IPC分类号： H01L21/02 ,  H01L21/762

CPC分类号： H01L21/76205 ,  H01L21/02057 ,  H01L21/02238 ,  H01L21/02252 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/31116 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7848

摘要： The invention discloses a treatment process for a semiconductor, comprising providing a substrate, the substrate comprises silicon material; defining a trench region; removing the trench region using a plasma etching process and exposing a trench surface, the trench surface comprising surface defects; forming an oxidation layer overlaying the trench surface; removing the oxidation layer and at least a portion of the surface defects; expositing a treated trench surface, the treated trench surface being substantially free from surface defects; and forming a layer of silicon germanium material overlaying the treated trench surface. The invention further provides a semiconductor processing technique used to eliminate or reduce dislocation defect on the semiconductor device and improve device performance. In the treatment process, a substrate is subjected to at least one oxidation-deoxidation processes, where an oxidation layer is formed and then removed.

摘要翻译： 本发明公开了一种用于半导体的处理方法，包括提供衬底，所述衬底包括硅材料; 限定沟槽区域; 使用等离子体蚀刻工艺去除沟槽区域并暴露沟槽表面，沟槽表面包括表面缺陷; 形成覆盖所述沟槽表面的氧化层; 去除氧化层和至少一部分表面缺陷; 展开经处理的沟槽表面，处理的沟槽表面基本上没有表面缺陷; 以及形成覆盖处理过的沟槽表面的硅锗材料层。 本发明还提供了用于消除或减少半导体器件上的位错缺陷并提高器件性能的半导体处理技术。 在处理过程中，对基材进行至少一种氧化 - 脱氧工艺，其中形成氧化层然后除去。

公开(公告)号：US08962494B2

公开(公告)日：2015-02-24

申请号：US14040737

申请日：2013-09-30

申请人： Shanghai Huali Microelectronics Corporation

发明人： Jun Huang ,  Zhibiao Mao ,  Ermin Chong

IPC分类号： H01L21/31 ,  H01L21/469 ,  H01L21/311 ,  H01L21/027 ,  H01L21/3213 ,  H01L21/033 ,  H01L21/308 ,  H01L21/28

CPC分类号： H01L21/31144 ,  H01L21/0273 ,  H01L21/0274 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/28123 ,  H01L21/3088 ,  H01L21/32139 ,  H01L21/823462

摘要： The present invention provides method of manufacturing dual gate oxide devices. The method comprises coating photoresist on the substrate which is deposited by an oxide thin film; removing some of the photoresist by exposure and development to divide the oxide thin film into a first area to be etched and a second area coated by the remained photoresist; coating RELACS material on the remained photoresist and heating to form a protective film based on the crosslinking reaction between the RELACS material and the high molecular compounds in the photoresist; performing UV radiation to strengthen and cure the protective film; removing the oxide thin film in the first area by etching and removing the remained photoresist; and depositing again an oxide firm to form an oxide layer of different thickness in the first area and the second area so as to form a dual gate oxide structure.

摘要翻译： 本发明提供制造双栅极氧化物器件的方法。 该方法包括在由氧化物薄膜沉积的衬底上涂覆光致抗蚀剂; 通过曝光和显影去除一些光致抗蚀剂以将氧化物薄膜划分成待蚀刻的第一区域和由残留的光致抗蚀剂涂覆的第二区域; 在剩余光致抗蚀剂上涂覆RELACS材料，加热形成基于RELACS材料与光致抗蚀剂中的高分子化合物之间的交联反应的保护膜; 执行紫外线辐射以加强和固化保护膜; 通过蚀刻和去除残留的光致抗蚀剂去除第一区域中的氧化物薄膜; 并再次沉积氧化物，以在第一区域和第二区域中形成不同厚度的氧化物层，以形成双栅极氧化物结构。

公开(公告)号：US08735300B1

公开(公告)日：2014-05-27

申请号：US13730486

申请日：2012-12-28

申请人： Shanghai Huali Microelectronics Corporation

发明人： Yu Zhang ,  Jun Huang ,  Chenguang Gai

IPC分类号： H01L21/00

CPC分类号： H01L21/76802 ,  H01L21/31144 ,  H01L21/76816

摘要： A method of forming contact hole is disclosed, including the steps of: providing a semiconductor substrate having a first dielectric layer, a second dielectric layer and a third dielectric layer formed thereon in this order; forming a first contact hole through the third dielectric layer, the second dielectric layer and the first dielectric layer by using an etching process to expose the semiconductor substrate; removing the third dielectric layer; forming a fourth dielectric layer over the second dielectric layer, the fourth dielectric layer filling the first contact hole; forming a second contact hole through the fourth dielectric layer, the second dielectric layer and the first dielectric layer to expose the semiconductor substrate; and removing the fourth dielectric layer. The method is capable of improving the stability of the contact-hole formation process.

摘要翻译： 公开了一种形成接触孔的方法，包括以下步骤：提供具有依次形成在其上的第一电介质层，第二电介质层和第三电介质层的半导体衬底; 通过使用蚀刻工艺来形成通过第三介电层，第二介电层和第一介电层的第一接触孔，以暴露半导体衬底; 去除第三介电层; 在所述第二电介质层上形成第四电介质层，所述第四电介质层填充所述第一接触孔; 通过所述第四电介质层，所述第二电介质层和所述第一介电层形成第二接触孔，以暴露所述半导体衬底; 并移除第四介质层。 该方法能够提高接触孔形成过程的稳定性。

公开(公告)号：US20140357056A1

公开(公告)日：2014-12-04

申请号：US14092235

申请日：2013-11-27

申请人： Shanghai Huali Microelectronics Corporation

发明人： Quanbo Li ,  Yu Zhang ,  Jun Huang ,  Shu Koon Pang

IPC分类号： H01L21/3065 ,  H01L21/02

CPC分类号： H01L21/3065 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02658 ,  H01L21/3086 ,  H01L21/31116 ,  H01L29/66636 ,  H01L29/7848

摘要： A method of forming a Σ-shaped trench is disclosed. The method includes: providing a silicon substrate; and performing a plasma etching process to form a Σ-shaped trench in the silicon substrate. The plasma etching process includes: etching the silicon substrate using a first plasma etching gas including a sulphur-containing fluoride; and etching the silicon substrate using a second plasma etching gas including a sulphur-containing fluoride and a polymer gas. A method of forming a semiconductor device is also disclosed.

摘要翻译： 公开了一种形成沟槽的方法。 该方法包括：提供硅衬底; 并进行等离子体蚀刻工艺，以在硅衬底中形成一个“S”形沟槽。 等离子体蚀刻工艺包括：使用包括含硫氟化物的第一等离子体蚀刻气体来蚀刻硅衬底; 以及使用包括含硫氟化物和聚合物气体的第二等离子体蚀刻气体来蚀刻硅衬底。 还公开了一种形成半导体器件的方法。

公开(公告)号：US20140342565A1

公开(公告)日：2014-11-20

申请号：US14040737

申请日：2013-09-30

申请人： Shanghai Huali Microelectronics Corporation

发明人： Jun Huang ,  Zhibiao Mao ,  Ermin Chong

IPC分类号： H01L21/311

CPC分类号： H01L21/31144 ,  H01L21/0273 ,  H01L21/0274 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/28123 ,  H01L21/3088 ,  H01L21/32139 ,  H01L21/823462

摘要： The present invention provides method of manufacturing dual gate oxide devices. The method comprises coating photoresist on the substrate which is deposited by an oxide thin film; removing some of the photoresist by exposure and development to divide the oxide thin film into a first area to be etched and a second area coated by the remained photoresist; coating RELACS material on the remained photoresist and heating to form a protective film based on the crosslinking reaction between the RELACS material and the high molecular compounds in the photoresist; performing UV radiation to strengthen and cure the protective film; removing the oxide thin film in the first area by etching and removing the remained photoresist; and depositing again an oxide film to form an oxide layer of different thickness in the first area and the second area so as to form a dual gate oxide structure.

摘要翻译： 本发明提供制造双栅极氧化物器件的方法。 该方法包括在由氧化物薄膜沉积的衬底上涂覆光致抗蚀剂; 通过曝光和显影去除一些光致抗蚀剂以将氧化物薄膜划分成待蚀刻的第一区域和由残留的光致抗蚀剂涂覆的第二区域; 在剩余光致抗蚀剂上涂覆RELACS材料，加热形成基于RELACS材料与光致抗蚀剂中的高分子化合物之间的交联反应的保护膜; 执行紫外线辐射以加强和固化保护膜; 通过蚀刻和去除残留的光致抗蚀剂去除第一区域中的氧化物薄膜; 并再次沉积氧化膜以在第一区域和第二区域中形成不同厚度的氧化物层，以便形成双栅氧化物结构。