Pipelined data relocation and improved chip architectures
    2.
    发明授权
    Pipelined data relocation and improved chip architectures 有权
    流水线数据迁移和改进的芯片架构

    公开(公告)号:US09122591B2

    公开(公告)日:2015-09-01

    申请号:US14106261

    申请日:2013-12-13

    Abstract: The present invention present methods and architectures for the pipelining of read operation with write operations. In particular, methods are presented for pipelining data relocation operations that allow for the checking and correction of data in the controller prior to its being re-written, but diminish or eliminate the additional time penalty this would normally incur. A number of architectural improve are described to facilitate these methods, including: introducing two registers on the memory where each is independently accessible by the controller; allowing a first memory register to be written from while a second register is written to; introducing two registers on the memory where the contents of the registers can be swapped.

    Abstract translation: 本发明提出了用于具有写入操作的读取操作的流水线的方法和架构。 特别地,提出了用于流水线数据迁移操作的方法,其允许在控制器被重写之前检查和校正控制器中的数据,但是减少或消除通常会产生的额外时间损失。 描述了许多架构改进以便于这些方法,包括:在存储器上引入两个寄存器,每个寄存器可由控制器独立访问; 允许在写入第二个寄存器时写入第一个存储器寄存器; 在存储器中引入两个寄存器,其中寄存器的内容可以交换。

    Multi-die write management
    5.
    发明授权
    Multi-die write management 有权
    多模写入管理

    公开(公告)号:US09218283B2

    公开(公告)日:2015-12-22

    申请号:US14094550

    申请日:2013-12-02

    Abstract: A die assignment scheme assigns data in the order it is received, to multiple memory dies. Any busy dies are skipped until they become ready again so that the system does not wait for busy dies to become ready. Immediately sequential writes to the same die are prohibited so that reading speed is not impacted.

    Abstract translation: 管芯分配方案按照接收的顺序将数据分配给多个存储器管芯。 任何忙碌的模具都被跳过,直到它们再次准备就绪,这样系统就不会等待繁忙的模具准备就绪。 禁止立即连续写入同一个裸片,以免读取速度受到影响。

    MULTI-DIE WRITE MANAGEMENT
    8.
    发明申请
    MULTI-DIE WRITE MANAGEMENT 有权
    多模写入管理

    公开(公告)号:US20150154108A1

    公开(公告)日:2015-06-04

    申请号:US14094550

    申请日:2013-12-02

    Abstract: A die assignment scheme assigns data in the order it is received, to multiple memory dies. Any busy dies are skipped until they become ready again so that the system does not wait for busy dies to become ready. Immediately sequential writes to the same die are prohibited so that reading speed is not impacted.

    Abstract translation: 管芯分配方案按照接收的顺序将数据分配给多个存储器管芯。 任何忙碌的模具都被跳过,直到它们再次准备就绪,这样系统就不会等待繁忙的模具准备就绪。 禁止立即连续写入同一个裸片,以免读取速度受到影响。

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