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公开(公告)号:US11322583B2
公开(公告)日:2022-05-03
申请号:US16821565
申请日:2020-03-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sungkeun Lim , Unki Kim , Yuyeong Jo , Yihwan Kim , Jinbum Kim , Pankwi Park , Ilgyou Shin , Seunghun Lee
Abstract: A semiconductor device includes; an active region; an isolation region defining the active region; a barrier layer on the active region; an upper semiconductor layer on the barrier layer; and a gate structure covering an upper surface, a lower surface, and side surfaces of the upper semiconductor layer in a first direction. The first direction is a direction parallel to an upper surface of the active region, and the barrier layer is disposed between the gate structure and the active region.
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2.
公开(公告)号:US20200373385A1
公开(公告)日:2020-11-26
申请号:US16821565
申请日:2020-03-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sungkeun Lim , Unki Kim , Yuyeong Jo , Yihwan Kim , Jinbum Kim , Pankwi Park , Ilgyou Shin , Seunghun Lee
Abstract: A semiconductor device includes; an active region; an isolation region defining the active region; a barrier layer on the active region; an upper semiconductor layer on the barrier layer; and a gate structure covering an upper surface, a lower surface, and side surfaces of the upper semiconductor layer in a first direction. The first direction is a direction parallel to an upper surface of the active region, and the barrier layer is disposed between the gate structure and the active region.
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3.
公开(公告)号:US20240297215A1
公开(公告)日:2024-09-05
申请号:US18658794
申请日:2024-05-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sungkeun Lim , Unki Kim , Yuyeong Jo , Yihwan Kim , Jinbum Kim , Pankwi Park , Ilgyou Shin , Seunghun Lee
CPC classification number: H01L29/0638 , H01L21/0245 , H01L29/66545 , H01L29/66795 , H01L29/785
Abstract: A semiconductor device includes; an active region; an isolation region defining the active region; a barrier layer on the active region; an upper semiconductor layer on the barrier layer; and a gate structure covering an upper surface, a lower surface, and side surfaces of the upper semiconductor layer in a first direction. The first direction is a direction parallel to an upper surface of the active region, and the barrier layer is disposed between the gate structure and the active region.
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公开(公告)号:US20240258230A1
公开(公告)日:2024-08-01
申请号:US18515463
申请日:2023-11-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sungkeun Lim , Dohyun Go , Unki Kim , Hyohoon Byeon , Yuyeong Jo , Jinyeong Joe
IPC: H01L23/522 , H01L21/768 , H01L23/29 , H01L23/31
CPC classification number: H01L23/5226 , H01L21/76898 , H01L23/291 , H01L23/3171
Abstract: A semiconductor device includes a substrate; an active region extending on the substrate in a first direction; a protective layer on a lower surface of the substrate; an etch stop layer on a lower surface of the protective layer; a device isolation layer defining the active region; a gate structure on the active region and extending in a second direction, intersecting the first direction; a source/drain region on the active region on both lateral sides of the gate structure; a contact structure connected to the source/drain region; and a power transmission structure electrically connected to the contact structure.
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公开(公告)号:US20230387234A1
公开(公告)日:2023-11-30
申请号:US18189538
申请日:2023-03-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyohoon Byeon , Sungkeun Lim , Dohyun Go , Unki Kim , Yuyeong Jo , Jinyeong Joe
IPC: H01L29/423 , H01L29/66 , H01L29/786 , H01L29/775 , H01L29/06
CPC classification number: H01L29/42392 , H01L29/66545 , H01L29/78696 , H01L29/775 , H01L29/0673 , H01L29/66553
Abstract: A semiconductor device includes a substrate including an active region extending in a first direction, a gate structure intersecting the active region on the substrate and extending in a second direction, a plurality of channel layers spaced apart from each other in a third direction, perpendicular to an upper surface of the substrate, on the active region and surrounded by the gate structure, and source/drain regions in recess regions of the active region, on opposite sides adjacent to the gate structure and electrically connected to the plurality of channel layers. Each of the plurality of channel layers includes first to third semiconductor layers sequentially stacked in the third direction, the first and third semiconductor layers include silicon (Si), and the second semiconductor layer includes silicon-germanium (SiGe). Side surfaces of the first to third semiconductor layers in the second direction are in contact with the gate structure.
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公开(公告)号:US20250048696A1
公开(公告)日:2025-02-06
申请号:US18609885
申请日:2024-03-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: KI HWAN KIM , Unki Kim , Chanyoung Kim , Jeongho Yoo , Ingyu Jang , Sujin Jung
IPC: H01L29/08 , H01L29/06 , H01L29/423 , H01L29/66 , H01L29/775
Abstract: A semiconductor device includes a substrate including an active pattern, a channel pattern on the active pattern, the channel pattern including a first semiconductor pattern, a second semiconductor pattern, and a third semiconductor pattern sequentially stacked and vertically spaced apart, a source/drain pattern on the active pattern, and a gate electrode on the first semiconductor pattern, the second semiconductor pattern, and the third semiconductor pattern, where the source/drain pattern includes a buffer layer and a main layer on the buffer layer, the main layer includes silicon that is doped with an impurity, an impurity concentration of the main layer is a first atomic fraction at a first level corresponding to the first semiconductor pattern, and the impurity concentration of the main layer is a second atomic fraction at a second level corresponding to the second semiconductor pattern.
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公开(公告)号:US20240242989A1
公开(公告)日:2024-07-18
申请号:US18406925
申请日:2024-01-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yeoseon Choi , Unki Kim
IPC: H01L21/673 , H01J37/20
CPC classification number: H01L21/67336 , H01J37/20
Abstract: The present disclosure describes example apparatuses (e.g., grid structures) for fixing or holding a specimen, where the grid structure is formed by alternately stacking different layers (e.g., silicon (Si) layers and silicon germanium (SiGe) layers). For example, the alternate layers may be visually distinguishable from each other and may have a configured thickness. As such, based on the visual distinguishability between layers and the configured thickness for each layer, the grid structure may be used to adjust the magnification during inspection of the specimen. For example, the stacked layers may serve as a scale to control the magnification of the electron microscope while inspecting the specimen based on the configured or known thickness of the layers. Additionally, the orientation of the stacked layers may be used as a reference when a specimen is inspected.
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公开(公告)号:US11996443B2
公开(公告)日:2024-05-28
申请号:US17729676
申请日:2022-04-26
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sungkeun Lim , Unki Kim , Yuyeong Jo , Yihwan Kim , Jinbum Kim , Pankwi Park , Ilgyou Shin , Seunghun Lee
CPC classification number: H01L29/0638 , H01L21/0245 , H01L29/66545 , H01L29/66795 , H01L29/785
Abstract: A semiconductor device includes; an active region; an isolation region defining the active region; a barrier layer on the active region; an upper semiconductor layer on the barrier layer; and a gate structure covering an upper surface, a lower surface, and side surfaces of the upper semiconductor layer in a first direction. The first direction is a direction parallel to an upper surface of the active region, and the barrier layer is disposed between the gate structure and the active region.
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公开(公告)号:US20220254878A1
公开(公告)日:2022-08-11
申请号:US17729676
申请日:2022-04-26
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sungkeun Lim , Unki Kim , Yuyeong Jo , Yihwan Kim , Jinbum Kim , Pankwi Park , Ilgyou Shin , Seunghun Lee
Abstract: A semiconductor device includes; an active region; an isolation region defining the active region; a barrier layer on the active region; an upper semiconductor layer on the barrier layer; and a gate structure covering an upper surface, a lower surface, and side surfaces of the upper semiconductor layer in a first direction. The first direction is a direction parallel to an upper surface of the active region, and the barrier layer is disposed between the gate structure and the active region.
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公开(公告)号:US11195917B2
公开(公告)日:2021-12-07
申请号:US16743627
申请日:2020-01-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jihye Yi , Unki Kim , Dongchan Suh
IPC: H01L29/10 , H01L29/423 , H01L29/78
Abstract: A semiconductor device is described that includes a substrate, an active region protruding from the substrate and extending in a first direction, a plurality of channel layers disposed on the active region and spaced apart from each other in a direction perpendicular to an upper surface of the substrate, an isolation film disposed between a lowermost channel layer of the plurality of channel layers and the active region, a gate electrode surrounding the plurality of channel layers and extending in a second direction intersecting the first direction, and a source/drain region disposed on at least one side of the gate electrode and connected to each of the plurality of channel layers. The isolation film is disposed on a level higher than a bottom surface of the source/drain region.
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