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    MEMORY DEVICE AND METHOD WITH PROCESSING-IN-MEMORY BLOCK
    1.
    发明申请
    MEMORY DEVICE AND METHOD WITH PROCESSING-IN-MEMORY BLOCK 有权

    公开(公告)号：US20250130795A1

    公开(公告)日：2025-04-24

    申请号：US18814641

    申请日：2024-08-26

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sunjung Lee ,  Yoonah Paik ,  Sanghoon Cha

    IPC: G06F9/30

    Abstract: A memory device includes a first scalar register file storing a first input fragment, a second scalar register file storing a second input fragment, an arithmetic logic unit (ALU), and a control circuit. The control circuit is configured to perform, using the ALU, a first operation between the first input fragment and a first weight fragment based on a first operation command received from a host, and to perform, using the ALU, a second operation between the second input fragment and a second weight fragment based on a second operation command received from the host.

    Semiconductor device
    4.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US12183742B2

    公开(公告)日：2024-12-31

    申请号：US18600403

    申请日：2024-03-08

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Yoon Tae Hwang ,  Sunjung Lee ,  Heonbok Lee ,  Geunwoo Kim ,  Wandon Kim

    IPC: H01L27/092 ,  H01L21/8238

    Abstract: A semiconductor device includes a first and second channel patterns on a substrate, each of the first and second channel patterns including vertically-stacked semiconductor patterns; a first source/drain pattern connected to the first channel pattern; a second source/drain pattern connected to the second channel pattern, the first and second source/drain patterns having different conductivity types; a first contact plug inserted in the first source/drain pattern, and a second contact plug inserted in the second source/drain pattern; a first interface layer interposed between the first source/drain pattern and the first contact plug; and a second interface layer interposed between the second source/drain pattern and the second contact plug, the first and second interface layers including different metallic elements from each other, a bottom portion of the second interface layer being positioned at a level that is lower than a bottom surface of a topmost one of the semiconductor patterns.

    SEMICONDUCTOR DEVICE
    5.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20240371717A1

    公开(公告)日：2024-11-07

    申请号：US18409221

    申请日：2024-01-10

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Donggon Yoo ,  Sunjung Lee ,  Jeongwon Hwang ,  Myung-Ho Kong ,  Yongho Ha

    IPC: H01L23/31 ,  H01L23/29 ,  H01L23/528 ,  H01L23/532

    Abstract: A semiconductor device includes a mold layer defining a trench and a conductive structure disposed on the trench. The conductive structure includes a conductive layer and a liner, and the conductive layer includes upper and lower portions. The liner includes a base portion and a sidewall portion on the base portion, and the upper portion of the conductive layer is disposed at a level higher than the sidewall portion of the liner. The sidewall portion of the liner is interposed between the lower portion of the conductive layer and the mold layer, and a top surface of the base portion of the liner is in contact with a bottom surface of the lower portion of the conductive layer. A width of the sidewall portion of the liner may decrease as a level increases.

    Semiconductor device
    7.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US11417656B2

    公开(公告)日：2022-08-16

    申请号：US16898719

    申请日：2020-06-11

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Yoon Tae Hwang ,  Sunjung Lee ,  Heonbok Lee ,  Geunwoo Kim ,  Wandon Kim

    IPC: H01L27/092 ,  H01L21/8238

    Abstract: A semiconductor device includes a first and second channel patterns on a substrate, each of the first and second channel patterns including vertically-stacked semiconductor patterns; a first source/drain pattern connected to the first channel pattern; a second source/drain pattern connected to the second channel pattern, the first and second source/drain patterns having different conductivity types from each other; a first contact plug inserted in the first source/drain pattern, and a second contact plug inserted in the second source/drain pattern; a first interface layer interposed between the first source/drain pattern and the first contact plug; and a second interface layer interposed between the second source/drain pattern and the second contact plug, the first and second interface layers including different metallic elements from each other, a bottom portion of the second interface layer being positioned at a level that is lower than a bottom surface of a topmost one of the semiconductor patterns.

    SEMICONDUCTOR DEVICE
    9.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20250022930A1

    公开(公告)日：2025-01-16

    申请号：US18754608

    申请日：2024-06-26

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sunjung Lee ,  Donggon Yoo ,  Jeongwon Hwang

    IPC: H01L29/423 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L29/06 ,  H01L29/417 ,  H01L29/49 ,  H01L29/775 ,  H01L29/786

    Abstract: A semiconductor device may include a substrate including an active pattern, a channel pattern on the active pattern, the channel pattern including semiconductor patterns vertically stacked to be spaced apart from each other, a gate electrode on the plurality of semiconductor patterns, a gate contact electrically connected to the gate electrode, a first metal layer on the gate contact, the first metal layer including a first conductive via and a first interconnection pattern on the first conductive via, a second metal layer on the first metal layer, the second metal layer including a second conductive via and a second interconnection pattern on the second conductive via, and a diffusion prevention pattern between the first interconnection pattern and the second conductive via. A level of a bottom surface of the diffusion prevention pattern may be lower than a level of the topmost surface of the first interconnection pattern.

    SEMICONDUCTOR DEVICE
    10.
    发明公开
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20240250088A1

    公开(公告)日：2024-07-25

    申请号：US18600403

    申请日：2024-03-08

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Yoon Tae Hwang ,  Sunjung Lee ,  Heonbok Lee ,  Geunwoo Kim ,  Wandon Kim

    IPC: H01L27/092 ,  H01L21/8238

    CPC classification number: H01L27/0924 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871

    Abstract: A semiconductor device includes a first and second channel patterns on a substrate, each of the first and second channel patterns including vertically-stacked semiconductor patterns; a first source/drain pattern connected to the first channel pattern; a second source/drain pattern connected to the second channel pattern, the first and second source/drain patterns having different conductivity types; a first contact plug inserted in the first source/drain pattern, and a second contact plug inserted in the second source/drain pattern; a first interface layer interposed between the first source/drain pattern and the first contact plug; and a second interface layer interposed between the second source/drain pattern and the second contact plug, the first and second interface layers including different metallic elements from each other, a bottom portion of the second interface layer being positioned at a level that is lower than a bottom surface of a topmost one of the semiconductor patterns.

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