公开(公告)号：US20250130795A1

公开(公告)日：2025-04-24

申请号：US18814641

申请日：2024-08-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sunjung Lee ,  Yoonah Paik ,  Sanghoon Cha

IPC: G06F9/30

Abstract: A memory device includes a first scalar register file storing a first input fragment, a second scalar register file storing a second input fragment, an arithmetic logic unit (ALU), and a control circuit. The control circuit is configured to perform, using the ALU, a first operation between the first input fragment and a first weight fragment based on a first operation command received from a host, and to perform, using the ALU, a second operation between the second input fragment and a second weight fragment based on a second operation command received from the host.